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powerpc: fix sysconf support for cache geometries

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Commit cdfbe5037f added sysconf support
for cache geometries on powerpc, but mishandled errno.  For valid input
parameters, sysconf() should not set errno.

	* sysdeps/unix/sysv/linux/powerpc/sysconf.c: Remove references
	to errno, and simplify remaining related code.
This commit is contained in:
Paul Clarke 2017-06-23 09:10:32 -03:00 committed by Tulio Magno Quites Machado Filho
parent 7dcdfbcf67
commit 1301c20f6c
2 changed files with 13 additions and 29 deletions
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5
ChangeLog
View File

@ -1,3 +1,8 @@
2017-06-23 Paul A. Clarke <pc@us.ibm.com>
* sysdeps/unix/sysv/linux/powerpc/sysconf.c: Remove references
to errno, and simplify remaining related code.
2017-06-23 Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com> 2017-06-23 Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
* sysdeps/powerpc/bits/hwcap.h: Add PPC_FEATURE2_DARN and * sysdeps/powerpc/bits/hwcap.h: Add PPC_FEATURE2_DARN and

37
sysdeps/unix/sysv/linux/powerpc/sysconf.c
View File

@ -22,37 +22,16 @@
static long linux_sysconf (int name); static long linux_sysconf (int name);
static long static inline long
auxv2sysconf (unsigned long type)
{
long rc;
rc = __getauxval (type);
if (rc == 0)
{
__set_errno (EINVAL);
rc = -1;
}
return rc;
}
static long
auxv2sysconf_cache_associativity (unsigned long type) auxv2sysconf_cache_associativity (unsigned long type)
{ {
long rc; return (__getauxval (type) & 0xffff0000) >> 16;
rc = auxv2sysconf (type);
if (rc != -1)
rc = (rc & 0xffff0000) >> 16;
return rc;
} }
static long static inline long
auxv2sysconf_cache_linesize (unsigned long type) auxv2sysconf_cache_linesize (unsigned long type)
{ {
long rc; return __getauxval (type) & 0xffff;
rc = auxv2sysconf (type);
if (rc != -1)
rc = rc & 0xffff;
return rc;
} }
/* Get the value of the system variable NAME. */ /* Get the value of the system variable NAME. */
@ -62,25 +41,25 @@ __sysconf (int name)
switch (name) switch (name)
{ {
case _SC_LEVEL1_ICACHE_SIZE: case _SC_LEVEL1_ICACHE_SIZE:
return auxv2sysconf (AT_L1I_CACHESIZE); return __getauxval (AT_L1I_CACHESIZE);
case _SC_LEVEL1_ICACHE_ASSOC: case _SC_LEVEL1_ICACHE_ASSOC:
return auxv2sysconf_cache_associativity (AT_L1I_CACHEGEOMETRY); return auxv2sysconf_cache_associativity (AT_L1I_CACHEGEOMETRY);
case _SC_LEVEL1_ICACHE_LINESIZE: case _SC_LEVEL1_ICACHE_LINESIZE:
return auxv2sysconf_cache_linesize (AT_L1I_CACHEGEOMETRY); return auxv2sysconf_cache_linesize (AT_L1I_CACHEGEOMETRY);
case _SC_LEVEL1_DCACHE_SIZE: case _SC_LEVEL1_DCACHE_SIZE:
return auxv2sysconf (AT_L1D_CACHESIZE); return __getauxval (AT_L1D_CACHESIZE);
case _SC_LEVEL1_DCACHE_ASSOC: case _SC_LEVEL1_DCACHE_ASSOC:
return auxv2sysconf_cache_associativity (AT_L1D_CACHEGEOMETRY); return auxv2sysconf_cache_associativity (AT_L1D_CACHEGEOMETRY);
case _SC_LEVEL1_DCACHE_LINESIZE: case _SC_LEVEL1_DCACHE_LINESIZE:
return auxv2sysconf_cache_linesize (AT_L1D_CACHEGEOMETRY); return auxv2sysconf_cache_linesize (AT_L1D_CACHEGEOMETRY);
case _SC_LEVEL2_CACHE_SIZE: case _SC_LEVEL2_CACHE_SIZE:
return auxv2sysconf (AT_L2_CACHESIZE); return __getauxval (AT_L2_CACHESIZE);
case _SC_LEVEL2_CACHE_ASSOC: case _SC_LEVEL2_CACHE_ASSOC:
return auxv2sysconf_cache_associativity (AT_L2_CACHEGEOMETRY); return auxv2sysconf_cache_associativity (AT_L2_CACHEGEOMETRY);
case _SC_LEVEL2_CACHE_LINESIZE: case _SC_LEVEL2_CACHE_LINESIZE:
return auxv2sysconf_cache_linesize (AT_L2_CACHEGEOMETRY); return auxv2sysconf_cache_linesize (AT_L2_CACHEGEOMETRY);
case _SC_LEVEL3_CACHE_SIZE: case _SC_LEVEL3_CACHE_SIZE:
return auxv2sysconf (AT_L3_CACHESIZE); return __getauxval (AT_L3_CACHESIZE);
case _SC_LEVEL3_CACHE_ASSOC: case _SC_LEVEL3_CACHE_ASSOC:
return auxv2sysconf_cache_associativity (AT_L3_CACHEGEOMETRY); return auxv2sysconf_cache_associativity (AT_L3_CACHEGEOMETRY);
case _SC_LEVEL3_CACHE_LINESIZE: case _SC_LEVEL3_CACHE_LINESIZE: