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Preserve bound registers for pointer pass/return
We need to save/restore bound registers and add a BND prefix before branches in _dl_runtime_profile so that bound registers for pointer pass and return are preserved when LD_AUDIT is used. [BZ #18134] * sysdeps/i386/configure.ac: Set HAVE_MPX_SUPPORT. * sysdeps/i386/configure: Regenerated. * sysdeps/i386/dl-trampoline.S (PRESERVE_BND_REGS_PREFIX): New. (_dl_runtime_profile): Save and restore Intel MPX return bound registers when calling _dl_call_pltexit. Add PRESERVE_BND_REGS_PREFIX before return. * sysdeps/i386/link-defines.sym (LRV_BND0_OFFSET): New. (LRV_BND1_OFFSET): Likewise. * sysdeps/x86/bits/link.h (La_i86_retval): Add lrv_bnd0 and lrv_bnd1. * sysdeps/x86_64/dl-trampoline.S (_dl_runtime_profile): Fix typo in bndmov encoding. * sysdeps/x86_64/dl-trampoline.h: Properly save and restore Intel MPX bound registers. Add PRESERVE_BND_REGS_PREFIX before branch instructions to preserve bounds.
This commit is contained in:
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632b3db8e2
commit
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20
ChangeLog
20
ChangeLog
@ -1,3 +1,23 @@
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2015-07-09 Igor Zamyatin <igor.zamyatin@intel.com>
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H.J. Lu <hongjiu.lu@intel.com>
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[BZ #18134]
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* sysdeps/i386/configure.ac: Set HAVE_MPX_SUPPORT.
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* sysdeps/i386/configure: Regenerated.
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* sysdeps/i386/dl-trampoline.S (PRESERVE_BND_REGS_PREFIX): New.
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(_dl_runtime_profile): Save and restore Intel MPX return bound
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registers when calling _dl_call_pltexit. Add
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PRESERVE_BND_REGS_PREFIX before return.
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* sysdeps/i386/link-defines.sym (LRV_BND0_OFFSET): New.
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(LRV_BND1_OFFSET): Likewise.
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* sysdeps/x86/bits/link.h (La_i86_retval): Add lrv_bnd0 and
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lrv_bnd1.
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* sysdeps/x86_64/dl-trampoline.S (_dl_runtime_profile): Fix
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typo in bndmov encoding.
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* sysdeps/x86_64/dl-trampoline.h: Properly save and restore
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Intel MPX bound registers. Add PRESERVE_BND_REGS_PREFIX before
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branch instructions to preserve bounds.
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2015-07-09 Adhemerval Zanella <adhemerval.zanella@linaro.org>
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* sysdeps/unix/sysv/linux/powerpc/powerpc64/libc-le.abilist
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14
NEWS
14
NEWS
@ -21,13 +21,13 @@ Version 2.22
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18049, 18068, 18080, 18093, 18100, 18104, 18110, 18111, 18116, 18125,
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18128, 18138, 18185, 18196, 18197, 18206, 18210, 18211, 18217, 18219,
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18220, 18221, 18234, 18244, 18245, 18247, 18287, 18319, 18324, 18333,
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18346, 18371, 18383, 18397, 18400, 18409, 18410, 18412, 18418, 18422,
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18434, 18435, 18444, 18468, 18469, 18470, 18479, 18483, 18495, 18496,
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18497, 18498, 18502, 18507, 18508, 18512, 18513, 18519, 18520, 18522,
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18527, 18528, 18529, 18530, 18532, 18533, 18534, 18536, 18539, 18540,
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18542, 18544, 18545, 18546, 18547, 18549, 18553, 18557, 18558, 18569,
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18583, 18585, 18586, 18592, 18593, 18594, 18602, 18612, 18613, 18619,
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18633, 18641, 18643, 18648.
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18346, 18371, 18383, 18397, 18400, 18409, 18410, 18412, 18134, 18418,
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18422, 18434, 18435, 18444, 18468, 18469, 18470, 18479, 18483, 18495,
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18496, 18497, 18498, 18502, 18507, 18508, 18512, 18513, 18519, 18520,
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18522, 18527, 18528, 18529, 18530, 18532, 18533, 18534, 18536, 18539,
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18540, 18542, 18544, 18545, 18546, 18547, 18549, 18553, 18557, 18558,
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18569, 18583, 18585, 18586, 18592, 18593, 18594, 18602, 18612, 18613,
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18619, 18633, 18641, 18643, 18648.
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* Cache information can be queried via sysconf() function on s390 e.g. with
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_SC_LEVEL1_ICACHE_SIZE as argument.
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27
sysdeps/i386/configure
vendored
27
sysdeps/i386/configure
vendored
@ -240,6 +240,33 @@ $as_echo "$libc_cv_cc_novzeroupper" >&6; }
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config_vars="$config_vars
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config-cflags-novzeroupper = $libc_cv_cc_novzeroupper"
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{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for Intel MPX support" >&5
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$as_echo_n "checking for Intel MPX support... " >&6; }
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if ${libc_cv_asm_mpx+:} false; then :
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$as_echo_n "(cached) " >&6
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else
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cat > conftest.s <<\EOF
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bndmov %bnd0,(%esp)
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EOF
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if { ac_try='${CC-cc} -c $ASFLAGS conftest.s 1>&5'
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{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
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(eval $ac_try) 2>&5
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ac_status=$?
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$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
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test $ac_status = 0; }; }; then
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libc_cv_asm_mpx=yes
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else
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libc_cv_asm_mpx=no
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fi
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rm -f conftest*
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fi
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{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_mpx" >&5
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$as_echo "$libc_cv_asm_mpx" >&6; }
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if test $libc_cv_asm_mpx == yes; then
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$as_echo "#define HAVE_MPX_SUPPORT 1" >>confdefs.h
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fi
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{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for AVX2 support" >&5
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$as_echo_n "checking for AVX2 support... " >&6; }
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if ${libc_cv_cc_avx2+:} false; then :
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@ -88,6 +88,21 @@ LIBC_TRY_CC_OPTION([-mno-vzeroupper],
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])
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LIBC_CONFIG_VAR([config-cflags-novzeroupper], [$libc_cv_cc_novzeroupper])
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dnl Check whether asm supports Intel MPX
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AC_CACHE_CHECK(for Intel MPX support, libc_cv_asm_mpx, [dnl
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cat > conftest.s <<\EOF
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bndmov %bnd0,(%esp)
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EOF
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if AC_TRY_COMMAND(${CC-cc} -c $ASFLAGS conftest.s 1>&AS_MESSAGE_LOG_FD); then
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libc_cv_asm_mpx=yes
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else
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libc_cv_asm_mpx=no
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fi
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rm -f conftest*])
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if test $libc_cv_asm_mpx == yes; then
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AC_DEFINE(HAVE_MPX_SUPPORT)
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fi
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dnl Check if -mavx2 works.
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AC_CACHE_CHECK(for AVX2 support, libc_cv_cc_avx2, [dnl
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LIBC_TRY_CC_OPTION([-mavx2], [libc_cv_cc_avx2=yes], [libc_cv_cc_avx2=no])
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@ -19,6 +19,12 @@
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#include <sysdep.h>
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#include <link-defines.h>
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#ifdef HAVE_MPX_SUPPORT
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# define PRESERVE_BND_REGS_PREFIX bnd
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#else
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# define PRESERVE_BND_REGS_PREFIX .byte 0xf2
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#endif
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.text
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.globl _dl_runtime_resolve
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.type _dl_runtime_resolve, @function
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@ -172,6 +178,13 @@ _dl_runtime_profile:
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movl %edx, LRV_EDX_OFFSET(%esp)
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fstpt LRV_ST0_OFFSET(%esp)
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fstpt LRV_ST1_OFFSET(%esp)
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#ifdef HAVE_MPX_SUPPORT
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bndmov %bnd0, LRV_BND0_OFFSET(%esp)
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bndmov %bnd1, LRV_BND1_OFFSET(%esp)
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#else
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.byte 0x66,0x0f,0x1b,0x44,0x24,LRV_BND0_OFFSET
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.byte 0x66,0x0f,0x1b,0x4c,0x24,LRV_BND1_OFFSET
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#endif
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pushl %esp
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cfi_adjust_cfa_offset (4)
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# Address of La_i86_regs area.
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@ -185,9 +198,17 @@ _dl_runtime_profile:
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movl LRV_EDX_OFFSET(%esp), %edx
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fldt LRV_ST1_OFFSET(%esp)
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fldt LRV_ST0_OFFSET(%esp)
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#ifdef HAVE_MPX_SUPPORT
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bndmov LRV_BND0_OFFSET(%esp), %bnd0
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bndmov LRV_BND1_OFFSET(%esp), %bnd1
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#else
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.byte 0x66,0x0f,0x1a,0x44,0x24,LRV_BND0_OFFSET
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.byte 0x66,0x0f,0x1a,0x4c,0x24,LRV_BND1_OFFSET
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#endif
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# Restore stack before return.
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addl $(LRV_SIZE + 4 + LR_SIZE + 4), %esp
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cfi_adjust_cfa_offset (-(LRV_SIZE + 4 + LR_SIZE + 4))
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PRESERVE_BND_REGS_PREFIX
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ret
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cfi_endproc
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.size _dl_runtime_profile, .-_dl_runtime_profile
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@ -16,3 +16,5 @@ LRV_EAX_OFFSET offsetof (struct La_i86_retval, lrv_eax)
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LRV_EDX_OFFSET offsetof (struct La_i86_retval, lrv_edx)
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LRV_ST0_OFFSET offsetof (struct La_i86_retval, lrv_st0)
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LRV_ST1_OFFSET offsetof (struct La_i86_retval, lrv_st1)
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LRV_BND0_OFFSET offsetof (struct La_i86_retval, lrv_bnd0)
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LRV_BND1_OFFSET offsetof (struct La_i86_retval, lrv_bnd1)
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@ -38,6 +38,8 @@ typedef struct La_i86_retval
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uint32_t lrv_edx;
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long double lrv_st0;
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long double lrv_st1;
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uint64_t lrv_bnd0;
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uint64_t lrv_bnd1;
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} La_i86_retval;
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@ -206,8 +206,8 @@ _dl_runtime_profile:
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# else
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.byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET)
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.byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
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.byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
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.byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
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.byte 0x66,0x0f,0x1b,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
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.byte 0x66,0x0f,0x1b,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
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# endif
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# endif
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@ -63,20 +63,6 @@
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movaps (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp), %xmm6
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movaps (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp), %xmm7
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#ifndef __ILP32__
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# ifdef HAVE_MPX_SUPPORT
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bndmov (LR_BND_OFFSET)(%rsp), %bnd0 # Restore bound
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bndmov (LR_BND_OFFSET + BND_SIZE)(%rsp), %bnd1 # registers.
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bndmov (LR_BND_OFFSET + BND_SIZE*2)(%rsp), %bnd2
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bndmov (LR_BND_OFFSET + BND_SIZE*3)(%rsp), %bnd3
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# else
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.byte 0x66,0x0f,0x1a,0x84,0x24;.long (LR_BND_OFFSET)
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.byte 0x66,0x0f,0x1a,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
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.byte 0x66,0x0f,0x1a,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
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.byte 0x66,0x0f,0x1a,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
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# endif
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#endif
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#ifdef RESTORE_AVX
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/* Check if any xmm0-xmm7 registers are changed by audit
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module. */
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@ -154,8 +140,24 @@
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1:
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#endif
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#ifndef __ILP32__
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# ifdef HAVE_MPX_SUPPORT
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bndmov (LR_BND_OFFSET)(%rsp), %bnd0 # Restore bound
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bndmov (LR_BND_OFFSET + BND_SIZE)(%rsp), %bnd1 # registers.
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bndmov (LR_BND_OFFSET + BND_SIZE*2)(%rsp), %bnd2
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bndmov (LR_BND_OFFSET + BND_SIZE*3)(%rsp), %bnd3
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# else
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.byte 0x66,0x0f,0x1a,0x84,0x24;.long (LR_BND_OFFSET)
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.byte 0x66,0x0f,0x1a,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
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.byte 0x66,0x0f,0x1a,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
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.byte 0x66,0x0f,0x1a,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
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# endif
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#endif
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mov 16(%rbx), %R10_LP # Anything in framesize?
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test %R10_LP, %R10_LP
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PRESERVE_BND_REGS_PREFIX
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jns 3f
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/* There's nothing in the frame size, so there
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@ -174,6 +176,7 @@
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addq $48, %rsp # Adjust the stack to the return value
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# (eats the reloc index and link_map)
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cfi_adjust_cfa_offset(-48)
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PRESERVE_BND_REGS_PREFIX
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jmp *%r11 # Jump to function address.
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3:
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@ -200,6 +203,7 @@
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movq 32(%rdi), %rsi
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movq 40(%rdi), %rdi
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PRESERVE_BND_REGS_PREFIX
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call *%r11
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mov 24(%rbx), %rsp # Drop the copied stack content
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@ -280,11 +284,11 @@
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#ifndef __ILP32__
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# ifdef HAVE_MPX_SUPPORT
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bndmov LRV_BND0_OFFSET(%rcx), %bnd0 # Restore bound registers.
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bndmov LRV_BND1_OFFSET(%rcx), %bnd1
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bndmov LRV_BND0_OFFSET(%rsp), %bnd0 # Restore bound registers.
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bndmov LRV_BND1_OFFSET(%rsp), %bnd1
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# else
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.byte 0x66,0x0f,0x1a,0x81;.long (LRV_BND0_OFFSET)
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.byte 0x66,0x0f,0x1a,0x89;.long (LRV_BND1_OFFSET)
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.byte 0x66,0x0f,0x1a,0x84,0x24;.long (LRV_BND0_OFFSET)
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.byte 0x66,0x0f,0x1a,0x8c,0x24;.long (LRV_BND1_OFFSET)
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# endif
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#endif
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@ -299,6 +303,7 @@
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addq $48, %rsp # Adjust the stack to the return value
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# (eats the reloc index and link_map)
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cfi_adjust_cfa_offset(-48)
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PRESERVE_BND_REGS_PREFIX
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retq
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#ifdef MORE_CODE
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