mirror of
https://sourceware.org/git/glibc.git
synced 2024-11-08 14:20:07 +00:00
PowerPC64 power8 strncpy cfi fixes
cfi info for stack adjust needs to be on the insn doing the adjust. cfi describing register saves can be anywhere after the save insn but before the reg is altered. Fewer locations with cfi result in smaller cfi programs and possibly slightly faster exception handling. Thus the LR cfi_offset move. The idea behind ajusting sp after restoring regs is to break a register dependency chain, in this case not be using r1 immediately after it is modified. The missing LR cfi_restore meant that code after the blr, unaligned_lt_16 and other labels, would have cfi that said LR was at cfa+16, but that code is reached without LR being saved. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Move LR cfi. Adjust stack after restoring regs. Add missing LR cfi_restore. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
This commit is contained in:
parent
750a0e4967
commit
174935af03
@ -1,3 +1,8 @@
|
||||
2017-10-23 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* sysdeps/powerpc/powerpc64/power8/strncpy.S: Move LR cfi.
|
||||
Adjust stack after restoring regs. Add missing LR cfi_restore.
|
||||
|
||||
2017-10-23 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* sysdeps/powerpc/powerpc64/power7/strncpy.S: Decrease FRAMESIZE.
|
||||
|
@ -241,23 +241,18 @@ L(zero_pad_start_1):
|
||||
/* Save the link register. */
|
||||
mflr r0
|
||||
std r0,16(r1)
|
||||
cfi_offset(lr, 16)
|
||||
|
||||
/* Create the stack frame. */
|
||||
stdu r1,-FRAMESIZE(r1)
|
||||
cfi_adjust_cfa_offset(FRAMESIZE)
|
||||
cfi_offset(lr, 16)
|
||||
|
||||
bl MEMSET
|
||||
#ifndef MEMSET_is_local
|
||||
nop
|
||||
#endif
|
||||
|
||||
/* Restore the stack frame. */
|
||||
addi r1,r1,FRAMESIZE
|
||||
cfi_adjust_cfa_offset(-FRAMESIZE)
|
||||
/* Restore the link register. */
|
||||
ld r0,16(r1)
|
||||
mtlr r0
|
||||
ld r0,FRAMESIZE+16(r1)
|
||||
|
||||
#ifndef USE_AS_STPNCPY
|
||||
mr r3,r30 /* Restore the return value of strncpy, i.e.:
|
||||
@ -266,12 +261,18 @@ L(zero_pad_start_1):
|
||||
#endif
|
||||
|
||||
/* Restore non-volatile registers and return. */
|
||||
ld r26,-48(r1)
|
||||
ld r27,-40(r1)
|
||||
ld r28,-32(r1)
|
||||
ld r29,-24(r1)
|
||||
ld r30,-16(r1)
|
||||
ld r31,-8(r1)
|
||||
ld r26,FRAMESIZE-48(r1)
|
||||
ld r27,FRAMESIZE-40(r1)
|
||||
ld r28,FRAMESIZE-32(r1)
|
||||
ld r29,FRAMESIZE-24(r1)
|
||||
ld r30,FRAMESIZE-16(r1)
|
||||
ld r31,FRAMESIZE-8(r1)
|
||||
/* Restore the stack frame. */
|
||||
addi r1,r1,FRAMESIZE
|
||||
cfi_adjust_cfa_offset(-FRAMESIZE)
|
||||
/* Restore the link register. */
|
||||
mtlr r0
|
||||
cfi_restore(lr)
|
||||
blr
|
||||
|
||||
/* The common case where [src]+16 will not cross a 4K page boundary.
|
||||
|
Loading…
Reference in New Issue
Block a user