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2004-09-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* stdlib/longlong.h [__M32R__] (add_ssaaaa, sub_ddmmss): Fix broken instruct operands. * elf/elf.h: Add R_M32R_* relocs.
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@ -1,3 +1,9 @@
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2004-09-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* stdlib/longlong.h [__M32R__] (add_ssaaaa, sub_ddmmss): Fix broken
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instruct operands.
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* elf/elf.h: Add R_M32R_* relocs.
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2004-09-09 Ulrich Drepper <drepper@redhat.com>
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* misc/sys/cdefs.h: Despite what the gcc manual says, gcc 3.2
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59
elf/elf.h
59
elf/elf.h
@ -2402,10 +2402,10 @@ typedef Elf32_Addr Elf32_Conflict;
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#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */
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#define R_390_TLS_TPOFF 56 /* Negated offset in static TLS
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block. */
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/* Keep this the last entry. */
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#define R_390_NUM 57
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/* CRIS relocations. */
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#define R_CRIS_NONE 0
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#define R_CRIS_8 1
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@ -2430,6 +2430,7 @@ typedef Elf32_Addr Elf32_Conflict;
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#define R_CRIS_NUM 20
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/* AMD x86-64 relocations. */
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#define R_X86_64_NONE 0 /* No reloc */
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#define R_X86_64_64 1 /* Direct 64 bit */
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@ -2462,6 +2463,62 @@ typedef Elf32_Addr Elf32_Conflict;
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#define R_X86_64_NUM 24
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/* M32R relocs. */
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#define R_M32R_NONE 0 /* No reloc. */
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#define R_M32R_16 1 /* Direct 16 bit. */
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#define R_M32R_32 2 /* Direct 32 bit. */
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#define R_M32R_24 3 /* Direct 24 bit. */
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#define R_M32R_10_PCREL 4 /* PC relative 10 bit shifted. */
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#define R_M32R_18_PCREL 5 /* PC relative 18 bit shifted. */
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#define R_M32R_26_PCREL 6 /* PC relative 26 bit shifted. */
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#define R_M32R_HI16_ULO 7 /* High 16 bit with unsigned low. */
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#define R_M32R_HI16_SLO 8 /* High 16 bit with signed low. */
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#define R_M32R_LO16 9 /* Low 16 bit. */
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#define R_M32R_SDA16 10 /* 16 bit offset in SDA. */
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#define R_M32R_GNU_VTINHERIT 11
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#define R_M32R_GNU_VTENTRY 12
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/* M32R relocs use SHT_RELA. */
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#define R_M32R_16_RELA 33 /* Direct 16 bit. */
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#define R_M32R_32_RELA 34 /* Direct 32 bit. */
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#define R_M32R_24_RELA 35 /* Direct 24 bit. */
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#define R_M32R_10_PCREL_RELA 36 /* PC relative 10 bit shifted. */
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#define R_M32R_18_PCREL_RELA 37 /* PC relative 18 bit shifted. */
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#define R_M32R_26_PCREL_RELA 38 /* PC relative 26 bit shifted. */
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#define R_M32R_HI16_ULO_RELA 39 /* High 16 bit with unsigned low */
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#define R_M32R_HI16_SLO_RELA 40 /* High 16 bit with signed low */
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#define R_M32R_LO16_RELA 41 /* Low 16 bit */
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#define R_M32R_SDA16_RELA 42 /* 16 bit offset in SDA */
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#define R_M32R_RELA_GNU_VTINHERIT 43
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#define R_M32R_RELA_GNU_VTENTRY 44
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#define R_M32R_GOT24 48 /* 24 bit GOT entry */
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#define R_M32R_26_PLTREL 49 /* 26 bit PC relative to PLT shifted */
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#define R_M32R_COPY 50 /* Copy symbol at runtime */
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#define R_M32R_GLOB_DAT 51 /* Create GOT entry */
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#define R_M32R_JMP_SLOT 52 /* Create PLT entry */
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#define R_M32R_RELATIVE 53 /* Adjust by program base */
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#define R_M32R_GOTOFF 54 /* 24 bit offset to GOT */
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#define R_M32R_GOTPC24 55 /* 24 bit PC relative offset to GOT */
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#define R_M32R_GOT16_HI_ULO 56 /* High 16 bit GOT entry with unsigned
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low */
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#define R_M32R_GOT16_HI_SLO 57 /* High 16 bit GOT entry with signed
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low */
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#define R_M32R_GOT16_LO 58 /* Low 16 bit GOT entry */
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#define R_M32R_GOTPC_HI_ULO 59 /* High 16 bit PC relative offset to
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GOT with unsigned low */
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#define R_M32R_GOTPC_HI_SLO 60 /* High 16 bit PC relative offset to
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GOT with signed low */
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#define R_M32R_GOTPC_LO 61 /* Low 16 bit PC relative offset to
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GOT */
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#define R_M32R_GOTOFF_HI_ULO 62 /* High 16 bit offset to GOT
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with unsigned low */
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#define R_M32R_GOTOFF_HI_SLO 63 /* High 16 bit offset to GOT
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with signed low */
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#define R_M32R_GOTOFF_LO 64 /* Low 16 bit offset to GOT */
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#define R_M32R_NUM 256 /* Keep this the last entry. */
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__END_DECLS
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#endif /* elf.h */
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@ -400,17 +400,17 @@ UDItype __umulsidi3 (USItype, USItype);
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#if defined (__M32R__) && W_TYPE_SIZE == 32
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#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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/* The cmp clears the condition bit. */ \
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__asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0" \
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__asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \
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: "=r" ((USItype) (sh)), \
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"=&r" ((USItype) (sl)) \
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: "%0" ((USItype) (ah)), \
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: "0" ((USItype) (ah)), \
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"r" ((USItype) (bh)), \
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"%1" ((USItype) (al)), \
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"1" ((USItype) (al)), \
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"r" ((USItype) (bl)) \
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: "cbit")
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#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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/* The cmp clears the condition bit. */ \
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__asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0" \
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__asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \
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: "=r" ((USItype) (sh)), \
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"=&r" ((USItype) (sl)) \
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: "0" ((USItype) (ah)), \
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