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powerpc: st{r,p}cpy optimization for aligned strings
This patch makes use of vectors for aligned inputs. Improvements upto 30% seen for larger aligned inputs. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
This commit is contained in:
Rajalakshmi Srinivasaraghavan
parent
5f1603c331
commit
1e36806fb8
@ -1,3 +1,8 @@
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2017-12-15 Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
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* sysdeps/powerpc/powerpc64/power8/strcpy.S: Use vectors
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for aligned inputs.
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2017-12-14 Siddhesh Poyarekar <siddhesh@sourceware.org>
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* benchtests/bench-strcmp.c: Print output in JSON format.
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@ -47,7 +47,7 @@
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64K as default, the page cross handling assumes minimum page size of
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4k. */
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.machine power7
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.machine power8
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ENTRY_TOCLESS (FUNC_NAME, 4)
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li r0,0 /* Doubleword with null chars to use
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with cmpb. */
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@ -120,7 +120,7 @@ L(pagecross):
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ldu r8, 8(r7)
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L(loop_before):
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/* Save the two doublewords readed from source and align the source
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/* Save the two doublewords read from source and align the source
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to 16 bytes for the loop. */
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mr r11,r3
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std r12,0(r11)
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@ -129,7 +129,150 @@ L(loop_before):
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rldicl r9,r4,0,60
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subf r7,r9,r7
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subf r11,r9,r11
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b L(loop_start)
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/* Source is adjusted to 16B alignment and destination r11 is
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also moved based on that adjustment. Now check if r11 is
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also 16B aligned to move to vectorized loop. */
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andi. r6, r11, 0xF
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bne L(loop_start)
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/* Prepare for the loop. */
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subf r4, r9, r4 /* Adjust r4 based on alignment. */
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li r7, 16 /* Load required offsets. */
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li r8, 32
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li r9, 48
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vspltisb v0, 0
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addi r4, r4, 16
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/* Are we 64-byte aligned? If so, jump to the vectorized loop.
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Else copy 16B till r4 is 64B aligned. */
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andi. r6, r4, 63
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beq L(qw_loop)
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lvx v6, 0, r4 /* Load 16 bytes from memory. */
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vcmpequb. v5, v0, v6 /* Check for null. */
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bne cr6, L(qw_done)
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stvx v6, 0, r11 /* Store 16 bytes. */
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addi r4, r4, 16 /* Increment the address. */
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addi r11, r11, 16
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andi. r6, r4, 63
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beq L(qw_loop)
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lvx v6, 0, r4
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vcmpequb. v5, v0, v6
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bne cr6, L(qw_done)
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stvx v6, 0, r11
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addi r4, r4, 16
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addi r11, r11, 16
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andi. r6, r4, 63
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beq L(qw_loop)
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lvx v6, 0, r4
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vcmpequb. v5, v0, v6
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bne cr6, L(qw_done)
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stvx v6, 0, r11
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addi r4, r4, 16
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addi r11, r11, 16
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.align 4
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L(qw_loop):
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lvx v1, r4, r0 /* Load 4 quadwords. */
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lvx v2, r4, r7
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lvx v3, r4, r8
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lvx v4, r4, r9
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vminub v5, v1, v2 /* Compare and merge into one VR for speed. */
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vminub v8, v3, v4
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vminub v7, v5, v8
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vcmpequb. v7, v7, v0 /* Check for NULLs. */
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bne cr6, L(qw_loop_done)
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stvx v1, r11, r0 /* Store 4 quadwords. */
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stvx v2, r11, r7
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stvx v3, r11, r8
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stvx v4, r11, r9
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addi r4, r4, 64 /* Adjust address for the next iteration. */
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addi r11, r11, 64 /* Adjust address for the next iteration. */
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lvx v1, r4, r0 /* Load 4 quadwords. */
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lvx v2, r4, r7
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lvx v3, r4, r8
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lvx v4, r4, r9
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vminub v5, v1, v2 /* Compare and merge into one VR for speed. */
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vminub v8, v3, v4
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vminub v7, v5, v8
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vcmpequb. v7, v7, v0 /* Check for NULLs. */
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bne cr6, L(qw_loop_done)
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stvx v1, r11, r0 /* Store 4 quadwords. */
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stvx v2, r11, r7
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stvx v3, r11, r8
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stvx v4, r11, r9
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addi r4, r4, 64 /* Adjust address for the next iteration. */
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addi r11, r11, 64 /* Adjust address for the next iteration. */
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lvx v1, r4, r0 /* Load 4 quadwords. */
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lvx v2, r4, r7
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lvx v3, r4, r8
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lvx v4, r4, r9
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vminub v5, v1, v2 /* Compare and merge into one VR for speed. */
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vminub v8, v3, v4
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vminub v7, v5, v8
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vcmpequb. v7, v7, v0 /* Check for NULLs. */
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bne cr6, L(qw_loop_done)
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stvx v1, r11, r0 /* Store 4 quadwords. */
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stvx v2, r11, r7
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stvx v3, r11, r8
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stvx v4, r11, r9
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addi r4, r4, 64 /* Adjust address for the next iteration. */
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addi r11, r11, 64 /* Adjust address for the next iteration. */
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b L(qw_loop)
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.align 4
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L(qw_loop_done):
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/* Null found in one of the 4 loads. */
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vcmpequb. v7, v1, v0
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vor v6, v1, v1
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bne cr6, L(qw_done)
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/* Not on the first 16B, So store it. */
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stvx v1, r11, r0
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addi r4, r4, 16
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addi r11, r11, 16
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vcmpequb. v7, v2, v0
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vor v6, v2, v2
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bne cr6, L(qw_done)
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/* Not on the second 16B, So store it. */
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stvx v2, r11, r0
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addi r4, r4, 16
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addi r11, r11, 16
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vcmpequb. v7, v3, v0
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vor v6, v3, v3
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bne cr6, L(qw_done)
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/* Not on the third 16B, So store it. */
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stvx v6, r11, r0
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addi r4, r4, 16
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addi r11, r11, 16
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vor v6, v4, v4
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.align 4
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L(qw_done):
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mr r7, r4
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/* Move the result to GPR. */
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#ifdef __LITTLE_ENDIAN__
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vsldoi v4, v6, v0, 8
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mfvrd r12, v4
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#else
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mfvrd r12, v6
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#endif
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/* Check for null in the first 8 bytes. */
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cmpb r10, r12, r0
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cmpdi cr6, r10, 0
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bne cr6, L(done2)
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/* Null found in second doubleword. */
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#ifdef __LITTLE_ENDIAN__
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mfvrd r6, v6
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#else
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vsldoi v6, v6, v0, 8
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mfvrd r6, v6
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#endif
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cmpb r10, r6, r0
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addi r7, r7, 8
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b L(done2)
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.align 5
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L(loop):
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