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Fix powerpc round, roundf spurious "inexact" (bug 19238).
The powerpc hard-float round and roundf functions, both 32-bit and 64-bit, raise spurious "inexact" exceptions for integer arguments from adding 0.5 and rounding to integer toward zero. Since these functions already save and restore the rounding mode, it's natural to make them restore the full floating-point state instead to fix this bug, which this patch does. The save of the state is moved after the first floating-point operation on the input so that any "invalid" exceptions from signaling NaN inputs are properly preserved. As a consequence of this approach to the fix, "inexact" for noninteger arguments (disallowed by TS 18661-1 but not by C99/C11, see bug 15479) is also avoided for these implementations; this is *not* a general fix for bug 15479 since plenty of other implementations of various functions still raise spurious "inexact" for noninteger arguments. This issue and fix do not apply to builds using power5+ versions of round and roundf, which use the frin instruction and avoid "inexact" exceptions that way. This patch should get hard-float powerpc32 and powerpc64 (default function implementations) back to a state where test-float and test-double will pass after ulps regeneration. Tested for powerpc32 and powerpc64. [BZ #15479] [BZ #19238] * sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Save floating-point state after first operation on input. Restore full state rather than just rounding mode. * sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S (__round): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S (__roundf): Likewise.
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@ -1,5 +1,14 @@
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2015-11-12 Joseph Myers <joseph@codesourcery.com>
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[BZ #15479]
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[BZ #19238]
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* sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Save
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floating-point state after first operation on input. Restore full
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state rather than just rounding mode.
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* sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise.
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* sysdeps/powerpc/powerpc64/fpu/s_round.S (__round): Likewise.
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* sysdeps/powerpc/powerpc64/fpu/s_roundf.S (__roundf): Likewise.
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[BZ #19235]
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* sysdeps/powerpc/powerpc64/fpu/s_llround.S (__llround): Do not
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add 0.5 to integer arguments.
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@ -38,7 +38,6 @@
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.section ".text"
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ENTRY (__round)
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -55,6 +54,8 @@ ENTRY (__round)
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fabs fp0,fp1
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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@ -70,7 +71,8 @@ ENTRY (__round)
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fsub fp1,fp1,fp13 /* x-= TWO52; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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fsub fp9,fp1,fp10 /* x+= 0.5; */
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@ -80,7 +82,8 @@ ENTRY (__round)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__round)
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@ -37,7 +37,6 @@
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.section ".text"
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ENTRY (__roundf )
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -54,6 +53,8 @@ ENTRY (__roundf )
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fabs fp0,fp1
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fsubs fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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@ -68,7 +69,8 @@ ENTRY (__roundf )
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fsubs fp1,fp1,fp13 /* x-= TWO23; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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fsubs fp9,fp1,fp10 /* x+= 0.5; */
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@ -78,7 +80,8 @@ ENTRY (__roundf )
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__roundf)
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@ -38,11 +38,12 @@
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EALIGN (__round, 4, 0)
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CALL_MCOUNT 0
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mffs fp11 /* Save current FPU rounding mode. */
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lfd fp13,.LC0@toc(2)
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fabs fp0,fp1
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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@ -53,7 +54,8 @@ EALIGN (__round, 4, 0)
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fsub fp1,fp1,fp13 /* x-= TWO52; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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fsub fp9,fp1,fp10 /* x+= 0.5; */
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@ -63,7 +65,8 @@ EALIGN (__round, 4, 0)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__round)
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@ -39,11 +39,12 @@
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EALIGN (__roundf, 4, 0)
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CALL_MCOUNT 0
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mffs fp11 /* Save current FPU rounding mode. */
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lfs fp13,.LC0@toc(2)
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fabs fp0,fp1
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fsubs fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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@ -54,7 +55,8 @@ EALIGN (__roundf, 4, 0)
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fsubs fp1,fp1,fp13 /* x-= TWO23; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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fsubs fp9,fp1,fp10 /* x+= 0.5; */
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@ -64,7 +66,8 @@ EALIGN (__roundf, 4, 0)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__roundf)
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