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riscv: Fix alignment-ignorant memcpy implementation
The memcpy optimization (commit 587a1290a1
) has a series
of mistakes:
- The implementation is wrong: the chunk size calculation is wrong
leading to invalid memory access.
- It adds ifunc supports as default, so --disable-multi-arch does
not work as expected for riscv.
- It mixes Linux files (memcpy ifunc selection which requires the
vDSO/syscall mechanism) with generic support (the memcpy
optimization itself).
- There is no __libc_ifunc_impl_list, which makes testing only
check the selected implementation instead of all supported
by the system.
This patch also simplifies the required bits to enable ifunc: there
is no need to memcopy.h; nor to add Linux-specific files.
The __memcpy_noalignment tail handling now uses a branchless strategy
similar to aarch64 (overlap 32-bits copies for sizes 4..7 and byte
copies for size 1..3).
Checked on riscv64 and riscv32 by explicitly enabling the function
on __libc_ifunc_impl_list on qemu-system.
Changes from v1:
* Implement the memcpy in assembly to correctly handle RISCV
strict-alignment.
Reviewed-by: Evan Green <evan@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
parent
2173173d57
commit
2149da3683
@ -1,136 +0,0 @@
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/* memcpy for RISC-V, ignoring buffer alignment
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <sys/asm.h>
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/* void *memcpy(void *, const void *, size_t) */
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ENTRY (__memcpy_noalignment)
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move t6, a0 /* Preserve return value */
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/* Bail if 0 */
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beqz a2, 7f
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/* Jump to byte copy if size < SZREG */
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li a4, SZREG
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bltu a2, a4, 5f
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/* Round down to the nearest "page" size */
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andi a4, a2, ~((16*SZREG)-1)
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beqz a4, 2f
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add a3, a1, a4
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/* Copy the first word to get dest word aligned */
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andi a5, t6, SZREG-1
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beqz a5, 1f
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REG_L a6, (a1)
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REG_S a6, (t6)
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/* Align dst up to a word, move src and size as well. */
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addi t6, t6, SZREG-1
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andi t6, t6, ~(SZREG-1)
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sub a5, t6, a0
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add a1, a1, a5
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sub a2, a2, a5
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/* Recompute page count */
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andi a4, a2, ~((16*SZREG)-1)
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beqz a4, 2f
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1:
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/* Copy "pages" (chunks of 16 registers) */
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REG_L a4, 0(a1)
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REG_L a5, SZREG(a1)
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REG_L a6, 2*SZREG(a1)
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REG_L a7, 3*SZREG(a1)
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REG_L t0, 4*SZREG(a1)
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REG_L t1, 5*SZREG(a1)
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REG_L t2, 6*SZREG(a1)
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REG_L t3, 7*SZREG(a1)
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REG_L t4, 8*SZREG(a1)
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REG_L t5, 9*SZREG(a1)
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REG_S a4, 0(t6)
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REG_S a5, SZREG(t6)
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REG_S a6, 2*SZREG(t6)
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REG_S a7, 3*SZREG(t6)
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REG_S t0, 4*SZREG(t6)
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REG_S t1, 5*SZREG(t6)
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REG_S t2, 6*SZREG(t6)
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REG_S t3, 7*SZREG(t6)
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REG_S t4, 8*SZREG(t6)
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REG_S t5, 9*SZREG(t6)
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REG_L a4, 10*SZREG(a1)
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REG_L a5, 11*SZREG(a1)
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REG_L a6, 12*SZREG(a1)
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REG_L a7, 13*SZREG(a1)
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REG_L t0, 14*SZREG(a1)
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REG_L t1, 15*SZREG(a1)
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addi a1, a1, 16*SZREG
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REG_S a4, 10*SZREG(t6)
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REG_S a5, 11*SZREG(t6)
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REG_S a6, 12*SZREG(t6)
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REG_S a7, 13*SZREG(t6)
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REG_S t0, 14*SZREG(t6)
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REG_S t1, 15*SZREG(t6)
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addi t6, t6, 16*SZREG
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bltu a1, a3, 1b
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andi a2, a2, (16*SZREG)-1 /* Update count */
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2:
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/* Remainder is smaller than a page, compute native word count */
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beqz a2, 7f
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andi a5, a2, ~(SZREG-1)
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andi a2, a2, (SZREG-1)
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add a3, a1, a5
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/* Jump directly to last word if no words. */
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beqz a5, 4f
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3:
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/* Use single native register copy */
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REG_L a4, 0(a1)
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addi a1, a1, SZREG
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REG_S a4, 0(t6)
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addi t6, t6, SZREG
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bltu a1, a3, 3b
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/* Jump directly out if no more bytes */
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beqz a2, 7f
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4:
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/* Copy the last word unaligned */
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add a3, a1, a2
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add a4, t6, a2
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REG_L a5, -SZREG(a3)
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REG_S a5, -SZREG(a4)
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ret
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5:
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/* Copy bytes when the total copy is <SZREG */
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add a3, a1, a2
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6:
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lb a4, 0(a1)
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addi a1, a1, 1
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sb a4, 0(t6)
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addi t6, t6, 1
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bltu a1, a3, 6b
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7:
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ret
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END (__memcpy_noalignment)
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@ -18,7 +18,9 @@
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#include <string.h>
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extern __typeof (memcpy) __memcpy_generic;
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hidden_proto (__memcpy_generic)
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#if IS_IN(libc)
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# define MEMCPY __memcpy_generic
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# undef libc_hidden_builtin_def
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# define libc_hidden_builtin_def(x)
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#endif
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#include <string/memcpy.c>
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162
sysdeps/riscv/multiarch/memcpy_noalignment.S
Normal file
162
sysdeps/riscv/multiarch/memcpy_noalignment.S
Normal file
@ -0,0 +1,162 @@
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/* memcpy for RISC-V, ignoring buffer alignment
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <sys/asm.h>
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/* memcpy optimization for CPUs with fast unaligned support
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(RISCV_HWPROBE_MISALIGNED_FAST).
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Copies are split into 3 main cases: small copies up to SZREG, copies up to
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BLOCK_SIZE (128 for 64 bits, 64 for 32 bits), and copies larger than BLOCK_SIZE.
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Large copies use a software pipelined loop processing BLOCK_SIZE bytes per
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iteration. The destination pointer is SZREG-byte aligned to minimize store
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unaligned accesses.
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The tail is handled with branchless copies. */
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#define BLOCK_SIZE (16 * SZREG)
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.attribute unaligned_access, 1
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ENTRY (__memcpy_noalignment)
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beq a2, zero, L(ret)
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/* if LEN < SZREG jump to tail handling. */
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li a5, SZREG-1
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mv a6, a0
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bleu a2, a5, L(tail)
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/* Copy the first word, align DEST to word, and adjust DEST/SRC/LEN
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based on the amount adjusted to align DEST. */
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REG_L a3, 0(a1)
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andi a5, a0, SZREG-1
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addi a2, a2, -SZREG
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li a4, SZREG
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sub a4, a4, a5
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REG_S a3, 0(a0)
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add a2, a5, a2
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/* If LEN < BLOCK_SIZE jump to word copy. */
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li a3, BLOCK_SIZE-1
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add a5, a0, a4
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add a1, a1, a4
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bleu a2, a3, L(word_copy_adjust)
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addi a7, a2, -BLOCK_SIZE
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andi a7, a7, -BLOCK_SIZE
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addi a7, a7, BLOCK_SIZE
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add a3, a5, a7
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mv a4, a1
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L(block_copy):
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REG_L a6, 0(a4)
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REG_L t0, SZREG(a4)
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REG_L t1, (2*SZREG)(a4)
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REG_L t2, (3*SZREG)(a4)
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REG_L t3, (4*SZREG)(a4)
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REG_L t4, (5*SZREG)(a4)
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REG_L t5, (6*SZREG)(a4)
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REG_L t6, (7*SZREG)(a4)
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REG_S a6, 0(a5)
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REG_S t0, SZREG(a5)
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REG_S t1, (2*SZREG)(a5)
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REG_S t2, (3*SZREG)(a5)
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REG_S t3, (4*SZREG)(a5)
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REG_S t4, (5*SZREG)(a5)
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REG_S t5, (6*SZREG)(a5)
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REG_S t6, (7*SZREG)(a5)
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REG_L a6, (8*SZREG)(a4)
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REG_L t0, (9*SZREG)(a4)
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REG_L t1, (10*SZREG)(a4)
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REG_L t2, (11*SZREG)(a4)
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REG_L t3, (12*SZREG)(a4)
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REG_L t4, (13*SZREG)(a4)
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REG_L t5, (14*SZREG)(a4)
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REG_L t6, (15*SZREG)(a4)
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addi a4, a4, BLOCK_SIZE
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REG_S a6, (8*SZREG)(a5)
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REG_S t0, (9*SZREG)(a5)
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REG_S t1, (10*SZREG)(a5)
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REG_S t2, (11*SZREG)(a5)
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REG_S t3, (12*SZREG)(a5)
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REG_S t4, (13*SZREG)(a5)
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REG_S t5, (14*SZREG)(a5)
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REG_S t6, (15*SZREG)(a5)
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addi a5, a5, BLOCK_SIZE
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bne a5, a3, L(block_copy)
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add a1, a1, a7
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andi a2, a2, BLOCK_SIZE-1
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/* 0 <= a2/LEN < BLOCK_SIZE. */
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L(word_copy):
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li a5, SZREG-1
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/* if LEN < SZREG jump to tail handling. */
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bleu a2, a5, L(tail_adjust)
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addi a7, a2, -SZREG
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andi a7, a7, -SZREG
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addi a7, a7, SZREG
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add a6, a3, a7
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mv a5, a1
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L(word_copy_loop):
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REG_L a4, 0(a5)
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addi a3, a3, SZREG
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addi a5, a5, SZREG
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REG_S a4, -SZREG(a3)
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bne a3, a6, L(word_copy_loop)
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add a1, a1, a7
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andi a2, a2, SZREG-1
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/* Copy the last word unaligned. */
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add a3, a1, a2
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add a4, a6, a2
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REG_L t0, -SZREG(a3)
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REG_S t0, -SZREG(a4)
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ret
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L(tail):
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/* Copy 4-7 bytes. */
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andi a5, a2, 4
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add a3, a1, a2
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add a4, a6, a2
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beq a5, zero, L(copy_0_3)
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lw t0, 0(a1)
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lw t1, -4(a3)
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sw t0, 0(a6)
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sw t1, -4(a4)
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ret
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/* Copy 0-3 bytes. */
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L(copy_0_3):
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beq a2, zero, L(ret)
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srli a2, a2, 1
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add t4, a1, a2
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add t5, a6, a2
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lbu t0, 0(a1)
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lbu t1, -1(a3)
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lbu t2, 0(t4)
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sb t0, 0(a6)
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sb t1, -1(a4)
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sb t2, 0(t5)
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L(ret):
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ret
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L(tail_adjust):
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mv a6, a3
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j L(tail)
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L(word_copy_adjust):
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mv a3, a5
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j L(word_copy)
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END (__memcpy_noalignment)
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@ -15,15 +15,6 @@ ifeq ($(subdir),stdlib)
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gen-as-const-headers += ucontext_i.sym
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endif
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ifeq ($(subdir),string)
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sysdep_routines += \
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memcpy \
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memcpy-generic \
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memcpy_noalignment \
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# sysdep_routines
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endif
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abi-variants := ilp32 ilp32d lp64 lp64d
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ifeq (,$(filter $(default-abi),$(abi-variants)))
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@ -34,3 +34,4 @@ int __riscv_hwprobe (struct riscv_hwprobe *pairs, size_t pair_count,
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/* Negate negative errno values to match pthreads API. */
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return -r;
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}
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libc_hidden_def (__riscv_hwprobe)
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8
sysdeps/unix/sysv/linux/riscv/include/sys/hwprobe.h
Normal file
8
sysdeps/unix/sysv/linux/riscv/include/sys/hwprobe.h
Normal file
@ -0,0 +1,8 @@
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#ifndef _SYS_HWPROBE_H
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# include_next <sys/hwprobe.h>
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#ifndef _ISOMAC
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libc_hidden_proto (__riscv_hwprobe)
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#endif
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#endif
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9
sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
Normal file
9
sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
Normal file
@ -0,0 +1,9 @@
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ifeq ($(subdir),string)
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sysdep_routines += \
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memcpy \
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memcpy-generic \
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memcpy_noalignment \
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# sysdep_routines
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CFLAGS-memcpy_noalignment.c += -mno-strict-align
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endif
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@ -1,4 +1,4 @@
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/* memcopy.h -- definitions for memory copy functions. RISC-V version.
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/* Enumerate available IFUNC implementations of a function. RISCV version.
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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@ -16,11 +16,28 @@
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdeps/generic/memcopy.h>
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#include <ifunc-impl-list.h>
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#include <string.h>
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#include <sys/hwprobe.h>
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/* Redefine the generic memcpy implementation to __memcpy_generic, so
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the memcpy ifunc can select between generic and special versions.
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In rtld, don't bother with all the ifunciness. */
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#if IS_IN (libc)
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#define MEMCPY __memcpy_generic
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#endif
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size_t
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__libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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size_t max)
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{
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size_t i = max;
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bool fast_unaligned = false;
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struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_CPUPERF_0 };
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if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
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&& (pair.value & RISCV_HWPROBE_MISALIGNED_MASK)
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== RISCV_HWPROBE_MISALIGNED_FAST)
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fast_unaligned = true;
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IFUNC_IMPL (i, name, memcpy,
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IFUNC_IMPL_ADD (array, i, memcpy, fast_unaligned,
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__memcpy_noalignment)
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IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_generic))
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return 0;
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}
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@ -28,8 +28,6 @@
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# include <riscv-ifunc.h>
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# include <sys/hwprobe.h>
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# define INIT_ARCH()
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extern __typeof (__redirect_memcpy) __libc_memcpy;
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extern __typeof (__redirect_memcpy) __memcpy_generic attribute_hidden;
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@ -38,14 +36,9 @@ extern __typeof (__redirect_memcpy) __memcpy_noalignment attribute_hidden;
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static inline __typeof (__redirect_memcpy) *
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select_memcpy_ifunc (uint64_t dl_hwcap, __riscv_hwprobe_t hwprobe_func)
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{
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unsigned long long int value;
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INIT_ARCH ();
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if (__riscv_hwprobe_one (hwprobe_func, RISCV_HWPROBE_KEY_CPUPERF_0, &value) != 0)
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return __memcpy_generic;
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if ((value & RISCV_HWPROBE_MISALIGNED_MASK) == RISCV_HWPROBE_MISALIGNED_FAST)
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unsigned long long int v;
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if (__riscv_hwprobe_one (hwprobe_func, RISCV_HWPROBE_KEY_CPUPERF_0, &v) == 0
|
||||
&& (v & RISCV_HWPROBE_MISALIGNED_MASK) == RISCV_HWPROBE_MISALIGNED_FAST)
|
||||
return __memcpy_noalignment;
|
||||
|
||||
return __memcpy_generic;
|
||||
@ -59,5 +52,6 @@ strong_alias (__libc_memcpy, memcpy);
|
||||
__hidden_ver1 (memcpy, __GI_memcpy, __redirect_memcpy)
|
||||
__attribute__ ((visibility ("hidden"))) __attribute_copy__ (memcpy);
|
||||
# endif
|
||||
|
||||
#else
|
||||
# include <string/memcpy.c>
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user