diff --git a/ChangeLog b/ChangeLog
index 31736a6352..f400460d75 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,12 @@
 2016-05-27  Joseph Myers  <joseph@codesourcery.com>
 
+	[BZ #20157]
+	* sysdeps/powerpc/powerpc32/fpu/s_fabsl.S (__fabsl): Use fsel to
+	determine whether to negate low half if [_ARCH_PPCGR], and integer
+	comparison otherwise.
+	* sysdeps/powerpc/powerpc64/fpu/s_fabsl.S (__fabsl): Use fsel to
+	determine whether to negate low half.
+
 	* math/libm-test.inc (NO_TEST_INLINE_FLOAT): Remove macro.
 	(NO_TEST_INLINE_DOUBLE): Likewise.
 	(TEST_COND_x86_64): Likewise.
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_fabsl.S b/sysdeps/powerpc/powerpc32/fpu/s_fabsl.S
index 0462d20630..866e817008 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_fabsl.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_fabsl.S
@@ -24,11 +24,28 @@ ENTRY(__fabsl)
 /* long double [f1,f2] fabs (long double [f1,f2] x);
    fabs(x,y) returns a value with the magnitude of x and
    with the sign bit of y.  */
+#ifdef _ARCH_PPCGR
+	/* fsel available.  */
 	fmr	fp0,fp1
+#else
+	/* Use integer operations to test sign of high part to avoid
+	   exceptions on sNaNs.  */
+	stwu	r1,-16(r1)
+	cfi_adjust_cfa_offset (16)
+	stfd	fp1,8(r1)
+#endif
 	fabs	fp1,fp1
-	fcmpu	cr1,fp0,fp1
-	beqlr	cr1
+#ifdef _ARCH_PPCGR
+	fneg	fp3,fp2
+	fsel	fp2,fp0,fp2,fp3
+#else
+	lwz	r3,8+HIWORD(r1)
+	cmpwi	cr6,r3,0
+	addi	r1,r1,16
+	cfi_adjust_cfa_offset (-16)
+	bgelr	cr6
 	fneg	fp2,fp2
+#endif
 	blr
 END (__fabsl)
 
diff --git a/sysdeps/powerpc/powerpc64/fpu/s_fabsl.S b/sysdeps/powerpc/powerpc64/fpu/s_fabsl.S
index 0462d20630..1f8f05e091 100644
--- a/sysdeps/powerpc/powerpc64/fpu/s_fabsl.S
+++ b/sysdeps/powerpc/powerpc64/fpu/s_fabsl.S
@@ -26,9 +26,8 @@ ENTRY(__fabsl)
    with the sign bit of y.  */
 	fmr	fp0,fp1
 	fabs	fp1,fp1
-	fcmpu	cr1,fp0,fp1
-	beqlr	cr1
-	fneg	fp2,fp2
+	fneg	fp3,fp2
+	fsel	fp2,fp0,fp2,fp3
 	blr
 END (__fabsl)