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Define bit_SSE2 and index_SSE2.
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ChangeLog
10
ChangeLog
@ -1,3 +1,13 @@
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2009-12-13 H.J. Lu <hongjiu.lu@intel.com>
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* sysdeps/i386/i686/multiarch/strcspn.S Include <init-arch.h>
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instead of <ifunc-defines.h>. Use bit_XXX and index_XXX to
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check processor feature.
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* sysdeps/i386/i686/multiarch/strlen.S: Likewise.
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* sysdeps/i386/i686/multiarch/strspn.S: Likewise.
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* sysdeps/x86_64/multiarch/init-arch.h (bit_SSE2): New definition.
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(index_SSE2): Likewise.
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2009-12-09 H.J. Lu <hongjiu.lu@intel.com>
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2009-12-09 H.J. Lu <hongjiu.lu@intel.com>
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* sysdeps/x86_64/multiarch/init-arch.h: Include <ifunc-defines.h>
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* sysdeps/x86_64/multiarch/init-arch.h: Include <ifunc-defines.h>
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@ -23,7 +23,7 @@
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#ifdef HAVE_SSE4_SUPPORT
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#ifdef HAVE_SSE4_SUPPORT
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#include <sysdep.h>
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#include <sysdep.h>
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#include <ifunc-defines.h>
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#include <init-arch.h>
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#ifdef USE_AS_STRPBRK
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#ifdef USE_AS_STRPBRK
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#define STRCSPN_SSE42 __strpbrk_sse42
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#define STRCSPN_SSE42 __strpbrk_sse42
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@ -64,7 +64,7 @@ ENTRY(STRCSPN)
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jne 1f
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jne 1f
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call __init_cpu_features
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call __init_cpu_features
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1: leal STRCSPN_IA32@GOTOFF(%ebx), %eax
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1: leal STRCSPN_IA32@GOTOFF(%ebx), %eax
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testl $(1<<20), CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET+__cpu_features@GOTOFF(%ebx)
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testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
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jz 2f
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jz 2f
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leal STRCSPN_SSE42@GOTOFF(%ebx), %eax
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leal STRCSPN_SSE42@GOTOFF(%ebx), %eax
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2: popl %ebx
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2: popl %ebx
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@ -80,7 +80,7 @@ ENTRY(STRCSPN)
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jne 1f
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jne 1f
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call __init_cpu_features
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call __init_cpu_features
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1: leal STRCSPN_IA32, %eax
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1: leal STRCSPN_IA32, %eax
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testl $(1<<20), CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET+__cpu_features
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testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
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jz 2f
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jz 2f
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leal STRCSPN_SSE42, %eax
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leal STRCSPN_SSE42, %eax
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2: ret
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2: ret
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@ -19,7 +19,7 @@
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02111-1307 USA. */
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02111-1307 USA. */
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#include <sysdep.h>
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#include <sysdep.h>
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#include <ifunc-defines.h>
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#include <init-arch.h>
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/* Define multiple versions only for the definition in libc and for the
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/* Define multiple versions only for the definition in libc and for the
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DSO. In static binaries, we need strlen before the initialization
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DSO. In static binaries, we need strlen before the initialization
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@ -46,7 +46,7 @@ ENTRY(strlen)
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jne 1f
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jne 1f
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call __init_cpu_features
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call __init_cpu_features
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1: leal __strlen_ia32@GOTOFF(%ebx), %eax
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1: leal __strlen_ia32@GOTOFF(%ebx), %eax
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testl $(1<<26), CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET+__cpu_features@GOTOFF(%ebx)
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testl $bit_SSE2, CPUID_OFFSET+index_SSE2+__cpu_features@GOTOFF(%ebx)
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jz 2f
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jz 2f
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leal __strlen_sse2@GOTOFF(%ebx), %eax
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leal __strlen_sse2@GOTOFF(%ebx), %eax
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2: popl %ebx
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2: popl %ebx
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@ -23,7 +23,7 @@
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#ifdef HAVE_SSE4_SUPPORT
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#ifdef HAVE_SSE4_SUPPORT
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#include <sysdep.h>
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#include <sysdep.h>
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#include <ifunc-defines.h>
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#include <init-arch.h>
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/* Define multiple versions only for the definition in libc. */
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/* Define multiple versions only for the definition in libc. */
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#ifndef NOT_IN_libc
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#ifndef NOT_IN_libc
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@ -49,7 +49,7 @@ ENTRY(strspn)
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jne 1f
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jne 1f
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call __init_cpu_features
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call __init_cpu_features
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1: leal __strspn_ia32@GOTOFF(%ebx), %eax
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1: leal __strspn_ia32@GOTOFF(%ebx), %eax
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testl $(1<<20), CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET+__cpu_features@GOTOFF(%ebx)
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testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
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jz 2f
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jz 2f
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leal __strspn_sse42@GOTOFF(%ebx), %eax
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leal __strspn_sse42@GOTOFF(%ebx), %eax
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2: popl %ebx
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2: popl %ebx
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@ -65,7 +65,7 @@ ENTRY(strspn)
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jne 1f
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jne 1f
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call __init_cpu_features
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call __init_cpu_features
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1: leal __strspn_ia32, %eax
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1: leal __strspn_ia32, %eax
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testl $(1<<20), CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET+__cpu_features
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testl $index_SSE2, CPUID_OFFSET+index_SSE4_2+__cpu_features
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jz 2f
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jz 2f
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leal __strspn_sse42, %eax
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leal __strspn_sse42, %eax
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2: ret
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2: ret
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@ -20,9 +20,11 @@
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#include <ifunc-defines.h>
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#include <ifunc-defines.h>
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#define bit_SSE2 (1 << 26)
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#define bit_SSSE3 (1 << 9)
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#define bit_SSSE3 (1 << 9)
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#define bit_SSE4_2 (1 << 20)
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#define bit_SSE4_2 (1 << 20)
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#define index_SSE2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET
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#define index_SSSE3 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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#define index_SSSE3 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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#define index_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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#define index_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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