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NEWS for MIPS ABIs
* NEWS: Announce support for new MIPS ABI extensions.
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NEWS
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NEWS
@ -53,6 +53,26 @@ Version 2.21
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* Merged gettext 0.19.3 into the intl subdirectory. This fixes building
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with newer versions of bison.
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* Support for MIPS o32 FPXX, FP64A and FP64 ABI Extensions.
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The original MIPS o32 hard-float ABI requires an FPU where double-precision
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registers overlay two consecutive single-precision registers. MIPS32R2
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introduced a new FPU mode (FR=1) where double-precision registers extend the
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corresponding single-precision registers which is incompatible with the
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o32 hard-float ABI. The MIPS SIMD ASE and the MIPSR6 architecture both
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require the use of FR=1 making a transition necessary. New o32 ABI
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extensions enable users to migrate over time from the original o32 ABI
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through to the updated o32 FP64 ABI. To achieve this the dynamic linker now
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tracks the ABI of any loaded object and verifies that new objects are
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compatible. Mode transitions will also be requested as required and
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unsupportable objects will be rejected. The ABI checks include both soft and
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hard float ABIs for o32, n32 and n64.
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GCC 5 with GNU binutils 2.25 onwards:
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It is strongly recommended that all o32 system libraries are built using the
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new o32 FPXX ABI (-mfpxx) to facilitate the transition as this is compatible
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with the original and all new o32 ABI extensions. Configure a MIPS GCC
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compiler using --with-fp-32=xx to set this by default.
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Version 2.20
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