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2015-01-05 Steve Ellcey <sellcey@imgtec.com>
* sysdeps/mips/memset.S (memset): Modify for mips32r6/mips64r6 to avoid using stl/str to align destination.
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@ -1,3 +1,8 @@
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2015-01-05 Steve Ellcey <sellcey@imgtec.com>
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* sysdeps/mips/memset.S (memset): Modify for mips32r6/mips64r6
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to avoid using stl/str to align destination.
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2015-01-05 Steve Ellcey <sellcey@imgtec.com>
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* sysdeps/mips/memcpy.S: Add support for mips32r6/mips64r6.
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@ -54,6 +54,14 @@
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# endif
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#endif
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#if __mips_isa_rev > 5
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# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
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# undef PREFETCH_STORE_HINT
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# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
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# endif
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# define R6_CODE
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#endif
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/* Some asm.h files do not have the L macro definition. */
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#ifndef L
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# if _MIPS_SIM == _ABIO32
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@ -72,6 +80,15 @@
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# endif
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#endif
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/* New R6 instructions that may not be in asm.h. */
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#ifndef PTR_LSA
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# if _MIPS_SIM == _ABI64
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# define PTR_LSA dlsa
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# else
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# define PTR_LSA lsa
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# endif
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#endif
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/* Using PREFETCH_HINT_PREPAREFORSTORE instead of PREFETCH_STORE
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or PREFETCH_STORE_STREAMED offers a large performance advantage
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but PREPAREFORSTORE has some special restrictions to consider.
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@ -231,11 +248,48 @@ LEAF(MEMSET_NAME)
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/* If the destination address is not aligned do a partial store to get it
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aligned. If it is already aligned just jump to L(aligned). */
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L(set0):
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#ifndef R6_CODE
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andi t2,a3,(NSIZE-1) /* word-unaligned address? */
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beq t2,zero,L(aligned) /* t2 is the unalignment count */
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PTR_SUBU a2,a2,t2
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C_STHI a1,0(a0)
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PTR_ADDU a0,a0,t2
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#else /* R6_CODE */
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andi t2,a0,(NSIZE-1)
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lapc t9,L(atable)
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PTR_LSA t9,t2,t9,2
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jrc t9
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L(atable):
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bc L(aligned)
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# ifdef USE_DOUBLE
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bc L(lb7)
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bc L(lb6)
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bc L(lb5)
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bc L(lb4)
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# endif
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bc L(lb3)
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bc L(lb2)
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bc L(lb1)
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L(lb7):
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sb a1,6(a0)
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L(lb6):
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sb a1,5(a0)
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L(lb5):
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sb a1,4(a0)
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L(lb4):
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sb a1,3(a0)
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L(lb3):
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sb a1,2(a0)
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L(lb2):
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sb a1,1(a0)
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L(lb1):
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sb a1,0(a0)
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li t9,NSIZE
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subu t2,t9,t2
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PTR_SUBU a2,a2,t2
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PTR_ADDU a0,a0,t2
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#endif /* R6_CODE */
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L(aligned):
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/* If USE_DOUBLE is not set we may still want to align the data on a 16
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@ -286,8 +340,12 @@ L(loop16w):
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bgtz v1,L(skip_pref)
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nop
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#endif
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#ifdef R6_CODE
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PREFETCH_FOR_STORE (2, a0)
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#else
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PREFETCH_FOR_STORE (4, a0)
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PREFETCH_FOR_STORE (5, a0)
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#endif
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L(skip_pref):
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C_ST a1,UNIT(0)(a0)
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C_ST a1,UNIT(1)(a0)
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