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* sysdeps/mips/mips64/memcpy.S: Fix porting bug that broke
unaligned copying of 8-15 bytes. From Chris Demetriou <cgd@broadcom.com>. Fix label names. * sysdeps/mips/mips64/memset.S: Fix label names. Make similar change as to memcpy.S. * sysdeps/mips/memcpy.S: Formatting changes. * sysdeps/mips/memset.S: Likewise.
This commit is contained in:
Alexandre Oliva
parent
4208b5c771
commit
2b15a21180
@ -54,12 +54,14 @@ ENTRY (memcpy)
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SWHI t0, 0(a0)
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addu a0, t1
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L(chk8w): andi t0, a2, 0x1f # 32 or more bytes left?
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L(chk8w):
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andi t0, a2, 0x1f # 32 or more bytes left?
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beq t0, a2, L(chk1w)
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subu a3, a2, t0 # Yes
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addu a3, a1 # a3 = end address of loop
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move a2, t0 # a2 = what will be left after loop
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L(lop8w): lw t0, 0(a1) # Loop taking 8 words at a time
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L(lop8w):
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lw t0, 0(a1) # Loop taking 8 words at a time
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lw t1, 4(a1)
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lw t2, 8(a1)
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lw t3, 12(a1)
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@ -79,28 +81,34 @@ L(lop8w): lw t0, 0(a1) # Loop taking 8 words at a time
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bne a1, a3, L(lop8w)
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sw t7, -4(a0)
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L(chk1w): andi t0, a2, 0x3 # 4 or more bytes left?
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L(chk1w):
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andi t0, a2, 0x3 # 4 or more bytes left?
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beq t0, a2, L(last8)
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subu a3, a2, t0 # Yes, handle them one word at a time
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addu a3, a1 # a3 again end address
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move a2, t0
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L(lop1w): lw t0, 0(a1)
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L(lop1w):
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lw t0, 0(a1)
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addiu a0, 4
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addiu a1, 4
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bne a1, a3, L(lop1w)
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sw t0, -4(a0)
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L(last8): blez a2, L(lst8e) # Handle last 8 bytes, one at a time
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L(last8):
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blez a2, L(lst8e) # Handle last 8 bytes, one at a time
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addu a3, a2, a1
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L(lst8l): lb t0, 0(a1)
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L(lst8l):
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lb t0, 0(a1)
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addiu a0, 1
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addiu a1, 1
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bne a1, a3, L(lst8l)
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sb t0, -1(a0)
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L(lst8e): jr ra # Bye, bye
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L(lst8e):
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jr ra # Bye, bye
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nop
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L(shift): subu a3, zero, a0 # Src and Dest unaligned
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L(shift):
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subu a3, zero, a0 # Src and Dest unaligned
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andi a3, 0x3 # (unoptimized case...)
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beq a3, zero, L(shft1)
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subu a2, a3 # a2 = bytes left
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@ -109,16 +117,18 @@ L(shift): subu a3, zero, a0 # Src and Dest unaligned
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addu a1, a3
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SWHI t0, 0(a0)
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addu a0, a3
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L(shft1): andi t0, a2, 0x3
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L(shft1):
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andi t0, a2, 0x3
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subu a3, a2, t0
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addu a3, a1
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L(shfth): LWHI t1, 0(a1) # Limp through, word by word
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L(shfth):
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LWHI t1, 0(a1) # Limp through, word by word
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LWLO t1, 3(a1)
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addiu a0, 4
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addiu a1, 4
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bne a1, a3, L(shfth)
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sw t1, -4(a0)
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b L(last8) # Handle anything which may be left
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b L(last8) # Handle anything which may be left
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move a2, t0
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.set reorder
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@ -43,35 +43,42 @@ ENTRY (memset)
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sll t0, a1, 16
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or a1, t0 # a1 is now pattern in full word
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L(ueven): subu t0, zero, a0 # Unaligned address?
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L(ueven):
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subu t0, zero, a0 # Unaligned address?
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andi t0, 0x3
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beq t0, zero, L(chkw)
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subu a2, t0
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SWHI a1, 0(a0) # Yes, handle first unaligned part
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addu a0, t0 # Now both a0 and a2 are updated
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L(chkw): andi t0, a2, 0x7 # Enough left for one loop iteration?
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L(chkw):
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andi t0, a2, 0x7 # Enough left for one loop iteration?
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beq t0, a2, L(chkl)
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subu a3, a2, t0
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addu a3, a0 # a3 is last loop address +1
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move a2, t0 # a2 is now # of bytes left after loop
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L(loopw): addiu a0, 8 # Handle 2 words pr. iteration
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L(loopw):
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addiu a0, 8 # Handle 2 words pr. iteration
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sw a1, -8(a0)
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bne a0, a3, L(loopw)
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sw a1, -4(a0)
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L(chkl): andi t0, a2, 0x4 # Check if there is at least a full
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L(chkl):
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andi t0, a2, 0x4 # Check if there is at least a full
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beq t0, zero, L(last8) # word remaining after the loop
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subu a2, t0
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sw a1, 0(a0) # Yes...
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addiu a0, 4
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L(last8): blez a2, L(exit) # Handle last 8 bytes (if cnt>0)
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L(last8):
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blez a2, L(exit) # Handle last 8 bytes (if cnt>0)
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addu a3, a2, a0 # a3 is last address +1
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L(lst8l): addiu a0, 1
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L(lst8l):
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addiu a0, 1
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bne a0, a3, L(lst8l)
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sb a1, -1(a0)
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L(exit): j ra # Bye, bye
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L(exit):
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j ra # Bye, bye
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nop
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.set reorder
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@ -42,8 +42,8 @@
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ENTRY (memcpy)
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.set noreorder
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slti a4, a2, 8 # Less than 8?
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bne a4, zero, L(last8)
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slti a4, a2, 16 # Less than 16?
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bne a4, zero, L(last16)
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move v0, a0 # Setup exit value before too late
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xor a4, a1, a0 # Find a0/a1 displacement
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@ -86,53 +86,53 @@ L(lop8w):
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sd t7, -8(a0)
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L(chk1w):
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andi a4, a2, 0x7 # 4 or more bytes left?
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beq a4, a2, L(last8)
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PTR_SUBU a3, a2, a4 # Yes, handle them one word at a time
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andi a4, a2, 0x7 # 8 or more bytes left?
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beq a4, a2, L(last16)
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PTR_SUBU a3, a2, a4 # Yes, handle them one dword at a time
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PTR_ADDU a3, a1 # a3 again end address
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move a2, a4
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L(lop1w):
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L(lop1w):
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ld a4, 0(a1)
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PTR_ADDIU a0, 8
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PTR_ADDIU a1, 8
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bne a1, a3, L(lop1w)
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sd a4, -8(a0)
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L(last8):
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blez a2, L(lst8e) # Handle last 8 bytes, one at a time
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L(last16):
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blez a2, L(lst16e) # Handle last 16 bytes, one at a time
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PTR_ADDU a3, a2, a1
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L(lst8l):
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L(lst16l):
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lb a4, 0(a1)
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PTR_ADDIU a0, 1
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PTR_ADDIU a1, 1
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bne a1, a3, L(lst8l)
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bne a1, a3, L(lst16l)
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sb a4, -1(a0)
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L(lst8e):
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L(lst16e):
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jr ra # Bye, bye
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nop
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L(shift):
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PTR_SUBU a3, zero, a0 # Src and Dest unaligned
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andi a3, 0x7 # (unoptimized case...)
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beq a3, zero, L(shfa5)
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beq a3, zero, L(shft1)
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PTR_SUBU a2, a3 # a2 = bytes left
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LDHI a4, 0(a1) # Take care of first odd part
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LDLO a4, 7(a1)
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PTR_ADDU a1, a3
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SDHI a4, 0(a0)
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PTR_ADDU a0, a3
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L(shfa5):
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L(shft1):
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andi a4, a2, 0x7
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PTR_SUBU a3, a2, a4
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PTR_ADDU a3, a1
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L(shfth):
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LDHI a5, 0(a1) # Limp through, word by word
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LDHI a5, 0(a1) # Limp through, dword by dword
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LDLO a5, 7(a1)
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PTR_ADDIU a0, 8
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PTR_ADDIU a1, 8
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bne a1, a3, L(shfth)
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sd a5, -8(a0)
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b L(last8) # Handle anything which may be left
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b L(last16) # Handle anything which may be left
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move a2, a4
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.set reorder
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@ -36,8 +36,8 @@
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ENTRY (memset)
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.set noreorder
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slti t5, a2, 8 # Less than 8?
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bne t5, zero, L(last8)
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slti t5, a2, 16 # Less than 16?
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bne t5, zero, L(last16)
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move v0, a0 # Setup exit value before too late
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beq a1, zero, L(ueven) # If zero pattern, no need to extend
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@ -64,24 +64,24 @@ L(chkw):
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PTR_ADDU a3, a0 # a3 is last loop address +1
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move a2, t4 # a2 is now # of bytes left after loop
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L(loopw):
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PTR_ADDIU a0, 16 # Handle 2 words pr. iteration
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PTR_ADDIU a0, 16 # Handle 2 dwords pr. iteration
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sd a1, -16(a0)
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bne a0, a3, L(loopw)
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sd a1, -8(a0)
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L(chkl):
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andi t4, a2, 0x8 # Check if there is at least a double
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beq t4, zero, L(last8) # word remaining after the loop
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beq t4, zero, L(last16) # word remaining after the loop
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PTR_SUBU a2, t4
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sd a1, 0(a0) # Yes...
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PTR_ADDIU a0, 8
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L(last8):
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blez a2, L(exit) # Handle last 8 bytes (if cnt>0)
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L(last16):
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blez a2, L(exit) # Handle last 16 bytes (if cnt>0)
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PTR_ADDU a3, a2, a0 # a3 is last address +1
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L(lst8l):
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L(lst16l):
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PTR_ADDIU a0, 1
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bne a0, a3, L(lst8l)
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bne a0, a3, L(lst16l)
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sb a1, -1(a0)
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L(exit):
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j ra # Bye, bye
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