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Use __sync_* on ARM where supported by the compiler.
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@ -1,3 +1,9 @@
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2010-11-24 Ken Werner <ken.werner@de.ibm.com>
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* sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h (atomic_full_barrier,
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__arch_compare_and_exchange_val_32_acq): Use the atomic builtins
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provided by GCC if __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 is defined.
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2010-11-22 Andreas Schwab <schwab@redhat.com>
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* sysdeps/arm/preconfigure: Only modify CFLAGS when configuring
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@ -37,7 +37,12 @@ typedef uintmax_t uatomic_max_t;
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void __arm_link_error (void);
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#ifdef __thumb2__
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/* Use the atomic builtins provided by GCC in case the backend provides
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a pattern to do this efficiently. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#define atomic_full_barrier() __sync_synchronize ()
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#elif defined __thumb2__
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#define atomic_full_barrier() \
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__asm__ __volatile__ \
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("movw\tip, #0x0fa0\n\t" \
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@ -64,11 +69,15 @@ void __arm_link_error (void);
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#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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__sync_val_compare_and_swap ((mem), (oldval), (newval))
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/* It doesn't matter what register is used for a_oldval2, but we must
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specify one to work around GCC PR rtl-optimization/21223. Otherwise
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it may cause a_oldval or a_tmp to be moved to a different register. */
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#ifdef __thumb2__
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#elif defined __thumb2__
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/* Thumb-2 has ldrex/strex. However it does not have barrier instructions,
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so we still need to use the kernel helper. */
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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