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Use __sync_* on ARM where supported by the compiler.

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Ken Werner 2010-11-24 23:23:48 +00:00 committed by Joseph Myers
parent 82515b866b
commit 2c2019389e
2 changed files with 17 additions and 2 deletions
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6
ChangeLog.arm
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@ -1,3 +1,9 @@
2010-11-24 Ken Werner <ken.werner@de.ibm.com>
* sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h (atomic_full_barrier,
__arch_compare_and_exchange_val_32_acq): Use the atomic builtins
provided by GCC if __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 is defined.
2010-11-22 Andreas Schwab <schwab@redhat.com> 2010-11-22 Andreas Schwab <schwab@redhat.com>
* sysdeps/arm/preconfigure: Only modify CFLAGS when configuring * sysdeps/arm/preconfigure: Only modify CFLAGS when configuring

13
sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h
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@ -37,7 +37,12 @@ typedef uintmax_t uatomic_max_t;
void __arm_link_error (void); void __arm_link_error (void);
#ifdef __thumb2__ /* Use the atomic builtins provided by GCC in case the backend provides
a pattern to do this efficiently. */
#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
#define atomic_full_barrier() __sync_synchronize ()
#elif defined __thumb2__
#define atomic_full_barrier() \ #define atomic_full_barrier() \
__asm__ __volatile__ \ __asm__ __volatile__ \
("movw\tip, #0x0fa0\n\t" \ ("movw\tip, #0x0fa0\n\t" \
@ -64,11 +69,15 @@ void __arm_link_error (void);
#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \ #define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
({ __arm_link_error (); oldval; }) ({ __arm_link_error (); oldval; })
#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
__sync_val_compare_and_swap ((mem), (oldval), (newval))
/* It doesn't matter what register is used for a_oldval2, but we must /* It doesn't matter what register is used for a_oldval2, but we must
specify one to work around GCC PR rtl-optimization/21223. Otherwise specify one to work around GCC PR rtl-optimization/21223. Otherwise
it may cause a_oldval or a_tmp to be moved to a different register. */ it may cause a_oldval or a_tmp to be moved to a different register. */
#ifdef __thumb2__ #elif defined __thumb2__
/* Thumb-2 has ldrex/strex. However it does not have barrier instructions, /* Thumb-2 has ldrex/strex. However it does not have barrier instructions,
so we still need to use the kernel helper. */ so we still need to use the kernel helper. */
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \