AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-22 21:10:07 +00:00
Code Issues Packages Projects Releases Wiki Activity

Fix whitespaces in last checkin.

Browse Source
This commit is contained in:
Ulrich Drepper 2009-08-07 09:47:12 -07:00
parent a546baa9cd
commit 3aa2588d4a
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
sysdeps/x86_64/cacheinfo.c
View File

@ -557,7 +557,7 @@ init_cacheinfo (void)
while (((eax >> 5) & 0x7) != level); while (((eax >> 5) & 0x7) != level);
threads = (eax >> 14) & 0x3ff; threads = (eax >> 14) & 0x3ff;
/* If max_cpuid >= 11, THREADS is the maximum number of /* If max_cpuid >= 11, THREADS is the maximum number of
addressable IDs for logical processors sharing the addressable IDs for logical processors sharing the
cache, instead of the maximum number of threads cache, instead of the maximum number of threads