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powerpc: Add HWCAP3/HWCAP4 data to TCB for Power Architecture.
This patch adds a new feature for powerpc. In order to get faster access to the HWCAP3/HWCAP4 masks, similar to HWCAP/HWCAP2 (i.e. for implementing __builtin_cpu_supports() in GCC) without the overhead of reading them from the auxiliary vector, we now reserve space for them in the TCB. This is an ABI change for GLIBC 2.39. Suggested-by: Peter Bergner <bergner@linux.ibm.com> Reviewed-by: Peter Bergner <bergner@linux.ibm.com>
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@ -235,6 +235,8 @@ _dl_print_diagnostics (char **environ)
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_dl_diagnostics_print_labeled_value ("dl_hwcap", GLRO (dl_hwcap));
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_dl_diagnostics_print_labeled_value ("dl_hwcap_important", HWCAP_IMPORTANT);
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_dl_diagnostics_print_labeled_value ("dl_hwcap2", GLRO (dl_hwcap2));
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_dl_diagnostics_print_labeled_value ("dl_hwcap3", GLRO (dl_hwcap3));
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_dl_diagnostics_print_labeled_value ("dl_hwcap4", GLRO (dl_hwcap4));
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_dl_diagnostics_print_labeled_string
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("dl_hwcaps_subdirs", _dl_hwcaps_subdirs);
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_dl_diagnostics_print_labeled_value
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@ -158,6 +158,8 @@ const ElfW(Phdr) *_dl_phdr;
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size_t _dl_phnum;
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uint64_t _dl_hwcap;
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uint64_t _dl_hwcap2;
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uint64_t _dl_hwcap3;
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uint64_t _dl_hwcap4;
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enum dso_sort_algorithm _dl_dso_sort_algo;
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@ -1234,6 +1234,10 @@ typedef struct
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#define AT_RSEQ_FEATURE_SIZE 27 /* rseq supported feature size. */
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#define AT_RSEQ_ALIGN 28 /* rseq allocation alignment. */
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/* More machine-dependent hints about processor capabilities. */
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#define AT_HWCAP3 29 /* extension of AT_HWCAP. */
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#define AT_HWCAP4 30 /* extension of AT_HWCAP. */
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#define AT_EXECFN 31 /* Filename of executable. */
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/* Pointer to the global system page used for system calls and other
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@ -646,6 +646,8 @@ struct rtld_global_ro
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/* Mask for more hardware capabilities that are available on some
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platforms. */
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EXTERN uint64_t _dl_hwcap2;
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EXTERN uint64_t _dl_hwcap3;
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EXTERN uint64_t _dl_hwcap4;
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EXTERN enum dso_sort_algorithm _dl_dso_sort_algo;
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@ -38,6 +38,10 @@
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needed.
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*/
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/* The total number of available bits (including those prior to
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_DL_HWCAP_FIRST). Some of these bits might not be used. */
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#define _DL_HWCAP_COUNT 128
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#ifndef PROCINFO_CLASS
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# define PROCINFO_CLASS
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#endif
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@ -61,7 +65,7 @@ PROCINFO_CLASS struct cpu_features _dl_powerpc_cpu_features
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#if !defined PROCINFO_DECL && defined SHARED
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._dl_powerpc_cap_flags
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#else
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PROCINFO_CLASS const char _dl_powerpc_cap_flags[64][15]
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PROCINFO_CLASS const char _dl_powerpc_cap_flags[_DL_HWCAP_COUNT][15]
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#endif
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#ifndef PROCINFO_DECL
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= {
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@ -22,16 +22,17 @@
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#include <ldsodefs.h>
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#include <sysdep.h> /* This defines the PPC_FEATURE[2]_* macros. */
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/* The total number of available bits (including those prior to
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_DL_HWCAP_FIRST). Some of these bits might not be used. */
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#define _DL_HWCAP_COUNT 64
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/* Feature masks are all 32-bits in size. */
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#define _DL_HWCAP_SIZE 32
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/* Features started at bit 31 and decremented as new features were added. */
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#define _DL_HWCAP_LAST 31
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/* AT_HWCAP2 feature strings follow the AT_HWCAP feature strings. */
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#define _DL_HWCAP2_OFFSET _DL_HWCAP_SIZE
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/* AT_HWCAP2 features started at bit 31 and decremented as new features were
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added. HWCAP2 feature bits start at bit 0. */
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#define _DL_HWCAP2_LAST 31
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/* AT_HWCAP3 feature strings follow the AT_HWCAP2 feature strings. */
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#define _DL_HWCAP3_OFFSET (_DL_HWCAP2_OFFSET + _DL_HWCAP_SIZE)
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/* AT_HWCAP4 feature strings follow the AT_HWCAP3 feature strings. */
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#define _DL_HWCAP4_OFFSET (_DL_HWCAP3_OFFSET + _DL_HWCAP_SIZE)
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/* These bits influence library search. */
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#define HWCAP_IMPORTANT (PPC_FEATURE_HAS_ALTIVEC \
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@ -187,21 +188,42 @@ _dl_procinfo (unsigned int type, unsigned long int word)
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case AT_HWCAP:
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_dl_printf ("AT_HWCAP: ");
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for (int i = 0; i <= _DL_HWCAP_LAST; ++i)
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for (int i = 0; i < _DL_HWCAP_SIZE; ++i)
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if (word & (1 << i))
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_dl_printf (" %s", _dl_hwcap_string (i));
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break;
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case AT_HWCAP2:
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{
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unsigned int offset = _DL_HWCAP_LAST + 1;
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_dl_printf ("AT_HWCAP2: ");
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/* We have to go through them all because the kernel added the
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AT_HWCAP2 features starting with the high bits. */
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for (int i = 0; i <= _DL_HWCAP2_LAST; ++i)
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if (word & (1 << i))
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_dl_printf (" %s", _dl_hwcap_string (offset + i));
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/* We have to go through them all because the kernel added the
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AT_HWCAP2 features starting with the high bits. */
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for (int i = 0; i < _DL_HWCAP_SIZE; ++i)
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if (word & (1 << i))
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_dl_printf (" %s", _dl_hwcap_string (_DL_HWCAP2_OFFSET + i));
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break;
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}
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case AT_HWCAP3:
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{
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_dl_printf ("AT_HWCAP3: ");
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/* We have to go through them all because the kernel added the
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AT_HWCAP3 features starting with the high bits. */
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for (int i = 0; i < _DL_HWCAP_SIZE; ++i)
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if (word & (1 << i))
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_dl_printf (" %s", _dl_hwcap_string (_DL_HWCAP3_OFFSET + i));
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break;
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}
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case AT_HWCAP4:
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{
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_dl_printf ("AT_HWCAP4: ");
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/* We have to go through them all because the kernel added the
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AT_HWCAP4 features starting with the high bits. */
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for (int i = 0; i <= _DL_HWCAP_SIZE; ++i)
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if (word & (1 << i))
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_dl_printf (" %s", _dl_hwcap_string (_DL_HWCAP4_OFFSET + i));
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break;
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}
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case AT_L1I_CACHEGEOMETRY:
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@ -31,7 +31,7 @@ void
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__tcb_parse_hwcap_and_convert_at_platform (void)
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{
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uint64_t h1, h2;
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uint64_t h1, h2, h3, h4;
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/* Read AT_PLATFORM string from auxv and convert it to a number. */
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__tcb.at_platform = _dl_string_platform (GLRO (dl_platform));
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@ -39,6 +39,8 @@ __tcb_parse_hwcap_and_convert_at_platform (void)
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/* Read HWCAP and HWCAP2 from auxv. */
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h1 = GLRO (dl_hwcap);
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h2 = GLRO (dl_hwcap2);
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h3 = GLRO (dl_hwcap3);
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h4 = GLRO (dl_hwcap4);
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/* hwcap contains only the latest supported ISA, the code checks which is
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and fills the previous supported ones. */
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@ -64,13 +66,16 @@ __tcb_parse_hwcap_and_convert_at_platform (void)
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else if (h1 & PPC_FEATURE_POWER5)
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h1 |= PPC_FEATURE_POWER4;
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uint64_t array_hwcaps[] = { h1, h2 };
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uint64_t array_hwcaps[] = { h1, h2, h3, h4 };
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init_cpu_features (&GLRO(dl_powerpc_cpu_features), array_hwcaps);
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/* Consolidate both HWCAP and HWCAP2 into a single doubleword so that
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we can read both in a single load later. */
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__tcb.hwcap = (h1 << 32) | (h2 & 0xffffffff);
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__tcb.hwcap_extn = 0x0;
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/* Consolidate both HWCAP3 and HWCAP4 into a single doubleword so that
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we can read both in a single load later. */
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__tcb.hwcap_extn = (h3 << 32) | (h4 & 0xffffffff);
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}
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#if IS_IN (rtld)
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@ -47,6 +47,8 @@ void _dl_parse_auxv (ElfW(auxv_t) *av, dl_parse_auxv_t auxv_values)
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GLRO(dl_platform) = (void *) auxv_values[AT_PLATFORM];
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GLRO(dl_hwcap) = auxv_values[AT_HWCAP];
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GLRO(dl_hwcap2) = auxv_values[AT_HWCAP2];
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GLRO(dl_hwcap3) = auxv_values[AT_HWCAP3];
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GLRO(dl_hwcap4) = auxv_values[AT_HWCAP4];
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GLRO(dl_clktck) = auxv_values[AT_CLKTCK];
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GLRO(dl_fpu_control) = auxv_values[AT_FPUCW];
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_dl_random = (void *) auxv_values[AT_RANDOM];
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@ -197,6 +197,8 @@ _dl_show_auxv (void)
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[AT_SYSINFO_EHDR - 2] = { "SYSINFO_EHDR: 0x", hex },
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[AT_RANDOM - 2] = { "RANDOM: 0x", hex },
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[AT_HWCAP2 - 2] = { "HWCAP2: 0x", hex },
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[AT_HWCAP3 - 2] = { "HWCAP3: 0x", hex },
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[AT_HWCAP4 - 2] = { "HWCAP4: 0x", hex },
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[AT_MINSIGSTKSZ - 2] = { "MINSIGSTKSZ: ", dec },
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[AT_L1I_CACHESIZE - 2] = { "L1I_CACHESIZE: ", dec },
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[AT_L1I_CACHEGEOMETRY - 2] = { "L1I_CACHEGEOMETRY: 0x", hex },
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@ -94,6 +94,8 @@ init_cpu_features (struct cpu_features *cpu_features, uint64_t hwcaps[])
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which are set by __tcb_parse_hwcap_and_convert_at_platform. */
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cpu_features->hwcap = hwcaps[0];
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cpu_features->hwcap2 = hwcaps[1];
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cpu_features->hwcap3 = hwcaps[2];
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cpu_features->hwcap4 = hwcaps[3];
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/* Default is to use aligned memory access on optimized function unless
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tunables is enable, since for this case user can explicit disable
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unaligned optimizations. */
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@ -26,6 +26,8 @@ struct cpu_features
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bool use_cached_memopt;
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unsigned long int hwcap;
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unsigned long int hwcap2;
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unsigned long int hwcap3;
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unsigned long int hwcap4;
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};
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static const char hwcap_names[] = {
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@ -87,6 +87,12 @@ __libc_start_main_impl (int argc, char **argv,
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case AT_HWCAP2:
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_dl_hwcap2 = (unsigned long int) av->a_un.a_val;
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break;
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case AT_HWCAP3:
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_dl_hwcap3 = (unsigned long int) av->a_un.a_val;
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break;
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case AT_HWCAP4:
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_dl_hwcap4 = (unsigned long int) av->a_un.a_val;
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break;
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case AT_PLATFORM:
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_dl_platform = (void *) av->a_un.a_val;
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break;
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