AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-29 00:01:12 +00:00
Code Issues Packages Projects Releases Wiki Activity

Assume Intel Core i3/i5/i7 processor if AVX is available

Browse Source
This commit is contained in:
H.J. Lu 2011-06-03 07:01:25 -04:00 committed by Ulrich Drepper
parent c8fc0c9169
commit 3d29045b5e
2 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
ChangeLog
View File

@ -1,3 +1,8 @@
2011-06-02 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
Assume Intel Core i3/i5/i7 processor if AVX is available.
2011-05-31 Andreas Schwab <schwab@redhat.com>
* nscd/nscd_getserv_r.c (nscd_getserv_r): Don't free non-malloced

7
sysdeps/x86_64/multiarch/init-arch.c
View File

@ -74,6 +74,7 @@ __init_cpu_features (void)
}
else if (family == 0x06)
{
ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
model += extended_model;
switch (model)
{
@ -83,6 +84,12 @@ __init_cpu_features (void)
__cpu_features.feature[index_Slow_BSF] |= bit_Slow_BSF;
break;
default:
/* Unknown family 0x06 processors. Assuming this is one
of Core i3/i5/i7 processors if AVX is available. */
if ((ecx & bit_AVX) == 0)
break;
case 0x1a:
case 0x1e:
case 0x1f: