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Fix sNaN handling in nearbyint on 32-bit sparc.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3): Don't check for sNaN before float register is loaded with the incoming argument. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3): Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
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@ -1,5 +1,15 @@
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2016-08-02 David S. Miller <davem@davemloft.net>
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* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
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(__nearbyint_vis3): Don't check for sNaN before float register is
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loaded with the incoming argument.
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* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
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(__nearbyintf_vis3): Likewise.
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* sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint):
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Likewise.
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* sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf):
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Likewise.
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* string/test-strncmp.c (do_test_limit): Make sure the test data
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stream is aligned as required for the type "CHAR".
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(do_test): Likewise.
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@ -36,15 +36,15 @@
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__nearbyint_vis3)
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sllx %o0, 32, %o0
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or %o0, %o1, %o0
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movxtod %o0, %f0
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fcmpd %fcc3, %f0, %f0 /* Check for sNaN */
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st %fsr, [%sp + 88]
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sethi %hi(TWO_FIFTYTWO), %o2
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sethi %hi(0xf8003e0), %o5
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ld [%sp + 88], %o4
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sllx %o0, 32, %o0
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or %o5, %lo(0xf8003e0), %o5
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or %o0, %o1, %o0
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movxtod %o0, %f0
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andn %o4, %o5, %o4
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fzero ZERO
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st %o4, [%sp + 80]
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@ -35,9 +35,9 @@
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__nearbyintf_vis3)
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movwtos %o0, %f1
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fcmps %fcc3, %f1, %f1 /* Check for sNaN */
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st %fsr, [%sp + 88]
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movwtos %o0, %f1
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sethi %hi(TWO_TWENTYTHREE), %o2
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sethi %hi(0xf8003e0), %o5
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ld [%sp + 88], %o4
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@ -36,21 +36,21 @@
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__nearbyint)
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sllx %o0, 32, %o0
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or %o0, %o1, %o0
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stx %o0, [%sp + 72]
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ldd [%sp + 72], %f0
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fcmpd %fcc3, %f0, %f0 /* Check for sNaN */
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st %fsr, [%sp + 88]
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sethi %hi(TWO_FIFTYTWO), %o2
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sethi %hi(0xf8003e0), %o5
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ld [%sp + 88], %o4
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sllx %o0, 32, %o0
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or %o5, %lo(0xf8003e0), %o5
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or %o0, %o1, %o0
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andn %o4, %o5, %o4
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fzero ZERO
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st %o4, [%sp + 80]
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stx %o0, [%sp + 72]
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sllx %o2, 32, %o2
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fnegd ZERO, SIGN_BIT
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ldd [%sp + 72], %f0
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ld [%sp + 80], %fsr
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stx %o2, [%sp + 72]
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fabsd %f0, %f14
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@ -35,9 +35,10 @@
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#define SIGN_BIT %f12 /* -0.0 */
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ENTRY (__nearbyintf)
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st %o0, [%sp + 68]
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ld [%sp + 68], %f1
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fcmps %fcc3, %f1, %f1 /* Check for sNaN */
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st %fsr, [%sp + 88]
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st %o0, [%sp + 68]
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sethi %hi(TWO_TWENTYTHREE), %o2
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sethi %hi(0xf8003e0), %o5
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ld [%sp + 88], %o4
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@ -46,7 +47,6 @@ ENTRY (__nearbyintf)
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fnegs ZERO, SIGN_BIT
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andn %o4, %o5, %o4
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st %o4, [%sp + 80]
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ld [%sp + 68], %f1
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ld [%sp + 80], %fsr
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st %o2, [%sp + 68]
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fabss %f1, %f14
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