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[powerpc] add 'volatile' to asm
Add 'volatile' keyword to a few asm statements, to force the compiler to generate the instructions therein. Some instances were implicitly volatile, but adding keyword for consistency. 2019-06-19 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/fpu/fenv_libc.h (relax_fenv_state): Add 'volatile'. * sysdeps/powerpc/fpu/fpu_control.h (__FPU_MFFS): Likewise. (__FPU_MFFSL): Likewise. (_FPU_SETCW): Likewise.
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@ -1,3 +1,10 @@
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2019-06-19 Paul A. Clarke <pc@us.ibm.com>
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* sysdeps/powerpc/fpu/fenv_libc.h (relax_fenv_state): Add 'volatile'.
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* sysdeps/powerpc/fpu/fpu_control.h (__FPU_MFFS): Likewise.
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(__FPU_MFFSL): Likewise.
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(_FPU_SETCW): Likewise.
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2019-06-19 Stan Shebs <stanshebs@google.com>
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Raoni Fassina Firmino <raoni@linux.ibm.com>
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@ -56,9 +56,9 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
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#define relax_fenv_state() \
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do { \
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if (GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
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asm (".machine push; .machine \"power6\"; " \
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asm volatile (".machine push; .machine \"power6\"; " \
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"mtfsfi 7,0,1; .machine pop"); \
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asm ("mtfsfi 7,0"); \
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asm volatile ("mtfsfi 7,0"); \
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} while(0)
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/* Set/clear a particular FPSCR bit (for instance,
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@ -67,7 +67,7 @@ typedef unsigned int fpu_control_t;
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/* Macros for accessing the hardware control word. */
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# define __FPU_MFFS() \
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({register double __fr; \
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__asm__ ("mffs %0" : "=f" (__fr)); \
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__asm__ __volatile__("mffs %0" : "=f" (__fr)); \
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__fr; \
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})
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@ -81,7 +81,7 @@ typedef unsigned int fpu_control_t;
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#ifdef _ARCH_PWR9
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# define __FPU_MFFSL() \
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({register double __fr; \
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__asm__ ("mffsl %0" : "=f" (__fr)); \
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__asm__ __volatile__("mffsl %0" : "=f" (__fr)); \
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__fr; \
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})
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#else
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@ -101,7 +101,7 @@ typedef unsigned int fpu_control_t;
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__u.__ll = 0xfff80000LL << 32; /* This is a QNaN. */ \
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__u.__ll |= (cw) & 0xffffffffLL; \
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__fr = __u.__d; \
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__asm__ ("mtfsf 255,%0" : : "f" (__fr)); \
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__asm__ __volatile__("mtfsf 255,%0" : : "f" (__fr)); \
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}
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/* Default control word set at startup. */
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