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Fix preprocessor indentation in sysdeps/mips/memcpy.S.
Checked in as obvious.
This commit is contained in:
Steve Ellcey
parent
e2c8fa2b1c
commit
4c0c0e2aef
@ -1,3 +1,7 @@
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2014-12-22 Steve Ellcey <sellcey@imgtec.com>
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* sysdeps/mips/memcpy.S: Fix preprocessor indentation.
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2014-12-22 Chris Metcalf <cmetcalf@ezchip.com>
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[BZ #17747]
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@ -16,67 +16,67 @@
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<http://www.gnu.org/licenses/>. */
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#ifdef ANDROID_CHANGES
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#include "machine/asm.h"
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#include "machine/regdef.h"
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#define USE_MEMMOVE_FOR_OVERLAP
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#define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
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#define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
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# include "machine/asm.h"
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# include "machine/regdef.h"
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# define USE_MEMMOVE_FOR_OVERLAP
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# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
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# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
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#elif _LIBC
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#include <sysdep.h>
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#include <regdef.h>
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#include <sys/asm.h>
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#define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
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#define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
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# include <sysdep.h>
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# include <regdef.h>
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# include <sys/asm.h>
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# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
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# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
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#elif _COMPILING_NEWLIB
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#include "machine/asm.h"
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#include "machine/regdef.h"
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#define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
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#define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
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# include "machine/asm.h"
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# include "machine/regdef.h"
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# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
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# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
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#else
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#include <regdef.h>
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#include <sys/asm.h>
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# include <regdef.h>
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# include <sys/asm.h>
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#endif
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#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
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(_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
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#ifndef DISABLE_PREFETCH
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#define USE_PREFETCH
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#endif
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# ifndef DISABLE_PREFETCH
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# define USE_PREFETCH
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# endif
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#endif
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#if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32))
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#ifndef DISABLE_DOUBLE
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#define USE_DOUBLE
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#endif
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# ifndef DISABLE_DOUBLE
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# define USE_DOUBLE
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# endif
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#endif
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/* Some asm.h files do not have the L macro definition. */
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#ifndef L
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#if _MIPS_SIM == _ABIO32
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# define L(label) $L ## label
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#else
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# define L(label) .L ## label
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#endif
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# if _MIPS_SIM == _ABIO32
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# define L(label) $L ## label
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# else
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# define L(label) .L ## label
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# endif
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#endif
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/* Some asm.h files do not have the PTR_ADDIU macro definition. */
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#ifndef PTR_ADDIU
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#ifdef USE_DOUBLE
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#define PTR_ADDIU daddiu
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#else
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#define PTR_ADDIU addiu
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#endif
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# ifdef USE_DOUBLE
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# define PTR_ADDIU daddiu
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# else
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# define PTR_ADDIU addiu
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# endif
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#endif
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/* Some asm.h files do not have the PTR_SRA macro definition. */
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#ifndef PTR_SRA
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#ifdef USE_DOUBLE
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#define PTR_SRA dsra
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#else
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#define PTR_SRA sra
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#endif
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# ifdef USE_DOUBLE
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# define PTR_SRA dsra
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# else
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# define PTR_SRA sra
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# endif
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#endif
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@ -126,12 +126,12 @@
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* If we have not picked out what hints to use at this point use the
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* standard load and store prefetch hints.
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*/
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#ifndef PREFETCH_STORE_HINT
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# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE
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#endif
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#ifndef PREFETCH_LOAD_HINT
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# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD
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#endif
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# ifndef PREFETCH_STORE_HINT
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# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE
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# endif
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# ifndef PREFETCH_LOAD_HINT
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# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD
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# endif
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/*
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* We double everything when USE_DOUBLE is true so we do 2 prefetches to
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@ -139,43 +139,43 @@
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* prefetch brings in 32 bytes.
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*/
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#ifdef USE_DOUBLE
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# define PREFETCH_CHUNK 64
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# define PREFETCH_FOR_LOAD(chunk, reg) \
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# ifdef USE_DOUBLE
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# define PREFETCH_CHUNK 64
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# define PREFETCH_FOR_LOAD(chunk, reg) \
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pref PREFETCH_LOAD_HINT, (chunk)*64(reg); \
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pref PREFETCH_LOAD_HINT, ((chunk)*64)+32(reg)
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# define PREFETCH_FOR_STORE(chunk, reg) \
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# define PREFETCH_FOR_STORE(chunk, reg) \
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pref PREFETCH_STORE_HINT, (chunk)*64(reg); \
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pref PREFETCH_STORE_HINT, ((chunk)*64)+32(reg)
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#else
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# define PREFETCH_CHUNK 32
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# define PREFETCH_FOR_LOAD(chunk, reg) \
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# else
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# define PREFETCH_CHUNK 32
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# define PREFETCH_FOR_LOAD(chunk, reg) \
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pref PREFETCH_LOAD_HINT, (chunk)*32(reg)
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# define PREFETCH_FOR_STORE(chunk, reg) \
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# define PREFETCH_FOR_STORE(chunk, reg) \
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pref PREFETCH_STORE_HINT, (chunk)*32(reg)
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#endif
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# endif
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/* MAX_PREFETCH_SIZE is the maximum size of a prefetch, it must not be less
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* than PREFETCH_CHUNK, the assumed size of each prefetch. If the real size
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* of a prefetch is greater than MAX_PREFETCH_SIZE and the PREPAREFORSTORE
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* hint is used, the code will not work correctly. If PREPAREFORSTORE is not
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* used then MAX_PREFETCH_SIZE does not matter. */
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#define MAX_PREFETCH_SIZE 128
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# define MAX_PREFETCH_SIZE 128
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/* PREFETCH_LIMIT is set based on the fact that we never use an offset greater
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* than 5 on a STORE prefetch and that a single prefetch can never be larger
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* than MAX_PREFETCH_SIZE. We add the extra 32 when USE_DOUBLE is set because
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* we actually do two prefetches in that case, one 32 bytes after the other. */
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#ifdef USE_DOUBLE
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# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + 32 + MAX_PREFETCH_SIZE
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#else
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# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + MAX_PREFETCH_SIZE
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#endif
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#if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE) \
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# ifdef USE_DOUBLE
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# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + 32 + MAX_PREFETCH_SIZE
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# else
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# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + MAX_PREFETCH_SIZE
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# endif
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# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE) \
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&& ((PREFETCH_CHUNK * 4) < MAX_PREFETCH_SIZE)
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/* We cannot handle this because the initial prefetches may fetch bytes that
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* are before the buffer being copied. We start copies with an offset
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* of 4 so avoid this situation when using PREPAREFORSTORE. */
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#error "PREFETCH_CHUNK is too large and/or MAX_PREFETCH_SIZE is too small."
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#endif
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# endif
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#else /* USE_PREFETCH not defined */
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# define PREFETCH_FOR_LOAD(offset, reg)
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# define PREFETCH_FOR_STORE(offset, reg)
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@ -183,7 +183,7 @@
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/* Allow the routine to be named something else if desired. */
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#ifndef MEMCPY_NAME
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#define MEMCPY_NAME memcpy
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# define MEMCPY_NAME memcpy
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#endif
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/* We use these 32/64 bit registers as temporaries to do the copying. */
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@ -192,15 +192,15 @@
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#define REG2 t2
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#define REG3 t3
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#if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABIO64))
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# define REG4 t4
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# define REG5 t5
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# define REG6 t6
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# define REG7 t7
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# define REG4 t4
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# define REG5 t5
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# define REG6 t6
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# define REG7 t7
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#else
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# define REG4 ta0
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# define REG5 ta1
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# define REG6 ta2
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# define REG7 ta3
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# define REG4 ta0
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# define REG5 ta1
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# define REG6 ta2
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# define REG7 ta3
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#endif
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/* We load/store 64 bits at a time when USE_DOUBLE is true.
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@ -208,44 +208,44 @@
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* conflicts with system header files. */
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#ifdef USE_DOUBLE
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# define C_ST sd
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# define C_LD ld
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#if __MIPSEB
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# define C_ST sd
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# define C_LD ld
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# if __MIPSEB
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# define C_LDHI ldl /* high part is left in big-endian */
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# define C_STHI sdl /* high part is left in big-endian */
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# define C_LDLO ldr /* low part is right in big-endian */
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# define C_STLO sdr /* low part is right in big-endian */
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#else
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# else
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# define C_LDHI ldr /* high part is right in little-endian */
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# define C_STHI sdr /* high part is right in little-endian */
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# define C_LDLO ldl /* low part is left in little-endian */
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# define C_STLO sdl /* low part is left in little-endian */
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#endif
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# endif
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#else
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# define C_ST sw
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# define C_LD lw
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#if __MIPSEB
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# define C_ST sw
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# define C_LD lw
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# if __MIPSEB
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# define C_LDHI lwl /* high part is left in big-endian */
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# define C_STHI swl /* high part is left in big-endian */
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# define C_LDLO lwr /* low part is right in big-endian */
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# define C_STLO swr /* low part is right in big-endian */
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#else
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# else
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# define C_LDHI lwr /* high part is right in little-endian */
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# define C_STHI swr /* high part is right in little-endian */
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# define C_LDLO lwl /* low part is left in little-endian */
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# define C_STLO swl /* low part is left in little-endian */
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#endif
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# endif
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#endif
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/* Bookkeeping values for 32 vs. 64 bit mode. */
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#ifdef USE_DOUBLE
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# define NSIZE 8
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# define NSIZEMASK 0x3f
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# define NSIZEDMASK 0x7f
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# define NSIZE 8
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# define NSIZEMASK 0x3f
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# define NSIZEDMASK 0x7f
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#else
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# define NSIZE 4
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# define NSIZEMASK 0x1f
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# define NSIZEDMASK 0x3f
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# define NSIZE 4
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# define NSIZEMASK 0x1f
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# define NSIZEDMASK 0x3f
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#endif
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#define UNIT(unit) ((unit)*NSIZE)
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#define UNITM1(unit) (((unit)*NSIZE)-1)
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@ -339,22 +339,22 @@ L(aligned):
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PREFETCH_FOR_STORE (3, a0)
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#endif
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#if defined(RETURN_FIRST_PREFETCH) && defined(USE_PREFETCH)
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#if PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE
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# if PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE
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sltu v1,t9,a0
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bgtz v1,L(skip_set)
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nop
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PTR_ADDIU v0,a0,(PREFETCH_CHUNK*4)
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L(skip_set):
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#else
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# else
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PTR_ADDIU v0,a0,(PREFETCH_CHUNK*1)
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#endif
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# endif
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#endif
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#if defined(RETURN_LAST_PREFETCH) && defined(USE_PREFETCH) \
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&& (PREFETCH_STORE_HINT != PREFETCH_HINT_PREPAREFORSTORE)
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PTR_ADDIU v0,a0,(PREFETCH_CHUNK*3)
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#ifdef USE_DOUBLE
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# ifdef USE_DOUBLE
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PTR_ADDIU v0,v0,32
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#endif
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# endif
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#endif
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L(loop16w):
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C_LD t0,UNIT(0)(a1)
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@ -367,9 +367,9 @@ L(loop16w):
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PREFETCH_FOR_STORE (5, a0)
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#if defined(RETURN_LAST_PREFETCH) && defined(USE_PREFETCH)
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PTR_ADDIU v0,a0,(PREFETCH_CHUNK*5)
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#ifdef USE_DOUBLE
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# ifdef USE_DOUBLE
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PTR_ADDIU v0,v0,32
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#endif
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# endif
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#endif
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L(skip_pref):
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C_LD REG2,UNIT(2)(a1)
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@ -523,15 +523,15 @@ L(ua_chk16w):
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PREFETCH_FOR_STORE (3, a0)
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#endif
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#if defined(RETURN_FIRST_PREFETCH) && defined(USE_PREFETCH)
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#if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
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# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
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sltu v1,t9,a0
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bgtz v1,L(ua_skip_set)
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nop
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PTR_ADDIU v0,a0,(PREFETCH_CHUNK*4)
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L(ua_skip_set):
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#else
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# else
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PTR_ADDIU v0,a0,(PREFETCH_CHUNK*1)
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#endif
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# endif
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#endif
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L(ua_loop16w):
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PREFETCH_FOR_LOAD (3, a1)
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@ -671,7 +671,7 @@ L(ua_smallCopy_loop):
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.set reorder
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END(MEMCPY_NAME)
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#ifndef ANDROID_CHANGES
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#ifdef _LIBC
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# ifdef _LIBC
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libc_hidden_builtin_def (MEMCPY_NAME)
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#endif
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# endif
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#endif
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