mirror of
https://sourceware.org/git/glibc.git
synced 2025-01-13 12:40:08 +00:00
x86-64: Remove assembler AVX512DQ check
The minimum GNU binutils requirement is 2.25 which supports AVX512DQ. Remove assembler AVX512DQ check.
This commit is contained in:
parent
5359c3bc91
commit
528f9ff6bf
@ -62,9 +62,6 @@
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/* Define if _rtld_local structure should be forced into .sdata section. */
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#undef HAVE_SDATA_SECTION
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/* Define if assembler supports AVX512DQ. */
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#undef HAVE_AVX512DQ_ASM_SUPPORT
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/* Define if assembler supports z10 zarch instructions as default on S390. */
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#undef HAVE_S390_MIN_Z10_ZARCH_ASM_SUPPORT
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27
sysdeps/x86_64/configure
vendored
27
sysdeps/x86_64/configure
vendored
@ -1,33 +1,6 @@
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# This file is generated from configure.ac by Autoconf. DO NOT EDIT!
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# Local configure fragment for sysdeps/x86_64.
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{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for AVX512DQ support in assembler" >&5
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$as_echo_n "checking for AVX512DQ support in assembler... " >&6; }
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if ${libc_cv_asm_avx512dq+:} false; then :
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$as_echo_n "(cached) " >&6
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else
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cat > conftest.s <<\EOF
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vandpd (%rax), %zmm6, %zmm1
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EOF
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if { ac_try='${CC-cc} -c $ASFLAGS conftest.s 1>&5'
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{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
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(eval $ac_try) 2>&5
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ac_status=$?
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$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
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test $ac_status = 0; }; }; then
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libc_cv_asm_avx512dq=yes
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else
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libc_cv_asm_avx512dq=no
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fi
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rm -f conftest*
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fi
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{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_avx512dq" >&5
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$as_echo "$libc_cv_asm_avx512dq" >&6; }
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if test $libc_cv_asm_avx512dq = yes; then
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$as_echo "#define HAVE_AVX512DQ_ASM_SUPPORT 1" >>confdefs.h
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fi
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{ $as_echo "$as_me:${as_lineno-$LINENO}: checking -mprefer-vector-width=128" >&5
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$as_echo_n "checking -mprefer-vector-width=128... " >&6; }
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if ${libc_cv_cc_mprefer_vector_width+:} false; then :
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@ -1,21 +1,6 @@
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GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
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# Local configure fragment for sysdeps/x86_64.
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dnl Check if asm supports AVX512DQ.
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AC_CACHE_CHECK(for AVX512DQ support in assembler, libc_cv_asm_avx512dq, [dnl
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cat > conftest.s <<\EOF
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vandpd (%rax), %zmm6, %zmm1
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EOF
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if AC_TRY_COMMAND(${CC-cc} -c $ASFLAGS conftest.s 1>&AS_MESSAGE_LOG_FD); then
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libc_cv_asm_avx512dq=yes
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else
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libc_cv_asm_avx512dq=no
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fi
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rm -f conftest*])
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if test $libc_cv_asm_avx512dq = yes; then
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AC_DEFINE(HAVE_AVX512DQ_ASM_SUPPORT)
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fi
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dnl Check if -mprefer-vector-width=128 works.
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AC_CACHE_CHECK(-mprefer-vector-width=128, libc_cv_cc_mprefer_vector_width, [dnl
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LIBC_TRY_CC_OPTION([-mprefer-vector-width=128],
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@ -22,9 +22,6 @@
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.text
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ENTRY (_ZGVeN8v_cos_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -232,13 +229,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
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call JUMPTARGET(cos)
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN8v_cos_knl)
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ENTRY (_ZGVeN8v_cos_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -454,5 +447,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8v_cos_skx)
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@ -22,9 +22,6 @@
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.text
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ENTRY (_ZGVeN8v_exp_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -234,13 +231,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
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call JUMPTARGET(exp)
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN8v_exp_knl)
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ENTRY (_ZGVeN8v_exp_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -452,5 +445,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8v_exp_skx)
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@ -22,9 +22,6 @@
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.text
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ENTRY (_ZGVeN8v_log_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_log
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -233,13 +230,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
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call JUMPTARGET(log)
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN8v_log_knl)
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ENTRY (_ZGVeN8v_log_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_log
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -459,5 +452,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8v_log_skx)
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@ -82,9 +82,6 @@
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.text
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ENTRY (_ZGVeN8vv_pow_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -405,13 +402,9 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
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vmovsd %xmm0, 1280(%rsp,%r15)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN8vv_pow_knl)
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ENTRY (_ZGVeN8vv_pow_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -737,5 +730,4 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
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vmovsd %xmm0, 1280(%rsp,%r15)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8vv_pow_skx)
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@ -22,9 +22,6 @@
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.text
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ENTRY (_ZGVeN8v_sin_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -233,13 +230,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
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call JUMPTARGET(sin)
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN8v_sin_knl)
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ENTRY (_ZGVeN8v_sin_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -456,5 +449,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
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vmovsd %xmm0, 1216(%rsp,%r15)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8v_sin_skx)
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@ -37,9 +37,6 @@
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.text
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ENTRY (_ZGVeN8vl8l8_sincos_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -303,14 +300,10 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
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vmovsd %xmm0, 1280(%rsp,%r15)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN8vl8l8_sincos_knl)
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libmvec_hidden_def(_ZGVeN8vl8l8_sincos_knl)
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ENTRY (_ZGVeN8vl8l8_sincos_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -585,7 +578,6 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
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vmovsd %xmm0, 1280(%rsp,%r15)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8vl8l8_sincos_skx)
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libmvec_hidden_def(_ZGVeN8vl8l8_sincos_skx)
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@ -22,9 +22,6 @@
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.text
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ENTRY (_ZGVeN16v_cosf_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -235,13 +232,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
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call JUMPTARGET(cosf)
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vmovss %xmm0, 1216(%rsp,%r15,8)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN16v_cosf_knl)
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ENTRY (_ZGVeN16v_cosf_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -451,5 +444,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
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call JUMPTARGET(cosf)
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vmovss %xmm0, 1216(%rsp,%r15,8)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16v_cosf_skx)
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@ -22,9 +22,6 @@
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.text
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ENTRY (_ZGVeN16v_expf_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -223,13 +220,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
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vmovss %xmm0, 1216(%rsp,%r15,8)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN16v_expf_knl)
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ENTRY (_ZGVeN16v_expf_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -438,5 +431,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
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vmovss %xmm0, 1216(%rsp,%r15,8)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16v_expf_skx)
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@ -22,9 +22,6 @@
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.text
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ENTRY (_ZGVeN16v_logf_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -207,13 +204,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
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call JUMPTARGET(logf)
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vmovss %xmm0, 1216(%rsp,%r15,8)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN16v_logf_knl)
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ENTRY (_ZGVeN16v_logf_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -407,5 +400,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
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vmovss %xmm0, 1216(%rsp,%r15,8)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16v_logf_skx)
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@ -82,9 +82,6 @@
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.text
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ENTRY (_ZGVeN16vv_powf_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -355,13 +352,9 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
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call JUMPTARGET(powf)
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vmovss %xmm0, 1280(%rsp,%r15,8)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN16vv_powf_knl)
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ENTRY (_ZGVeN16vv_powf_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -641,5 +634,4 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
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call JUMPTARGET(powf)
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vmovss %xmm0, 1216(%rsp,%r15,8)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16vv_powf_skx)
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@ -50,9 +50,6 @@
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.text
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ENTRY (_ZGVeN16vl4l4_sincosf_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_fFF _ZGVdN8vl4l4_sincosf
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -266,14 +263,10 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vl4l4_sincosf
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vmovss %xmm0, 1280(%rsp,%r15,8)
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jmp .LBL_1_7
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#endif
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END (_ZGVeN16vl4l4_sincosf_knl)
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libmvec_hidden_def(_ZGVeN16vl4l4_sincosf_knl)
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ENTRY (_ZGVeN16vl4l4_sincosf_skx)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
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#else
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pushq %rbp
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cfi_adjust_cfa_offset (8)
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cfi_rel_offset (%rbp, 0)
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@ -496,7 +489,6 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
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vmovss %xmm0, 1280(%rsp,%r15,8)
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16vl4l4_sincosf_skx)
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libmvec_hidden_def(_ZGVeN16vl4l4_sincosf_skx)
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@ -22,9 +22,6 @@
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.text
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ENTRY(_ZGVeN16v_sinf_knl)
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#ifndef HAVE_AVX512DQ_ASM_SUPPORT
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WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
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#else
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/*
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ALGORITHM DESCRIPTION:
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@ -239,13 +236,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
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call JUMPTARGET(sinf)
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vmovss %xmm0, 1216(%rsp,%r15,8)
|
||||
jmp .LBL_1_7
|
||||
#endif
|
||||
END(_ZGVeN16v_sinf_knl)
|
||||
|
||||
ENTRY (_ZGVeN16v_sinf_skx)
|
||||
#ifndef HAVE_AVX512DQ_ASM_SUPPORT
|
||||
WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
|
||||
#else
|
||||
/*
|
||||
ALGORITHM DESCRIPTION:
|
||||
|
||||
@ -470,5 +463,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
|
||||
|
||||
vmovss %xmm0, 1216(%rsp,%r15,8)
|
||||
jmp .LBL_2_7
|
||||
#endif
|
||||
END (_ZGVeN16v_sinf_skx)
|
||||
|
Loading…
Reference in New Issue
Block a user