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AArch64: Improve codegen in AdvSIMD pow
Remove spurious ADRP. Improve memory access by shuffling constants and using more indexed MLAs. A few more optimisation with no impact on accuracy - force fmas contraction - switch from shift-aided rint to rint instruction Between 1 and 5% throughput improvement on Neoverse V1 depending on benchmark.
This commit is contained in:
Pierre Blanchard
Wilco Dijkstra
parent
b602f60f5e
commit
569cfaaf49
@ -22,9 +22,6 @@
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/* Defines parameters of the approximation and scalar fallback. */
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#include "finite_pow.h"
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#define VecSmallExp v_u64 (SmallExp)
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#define VecThresExp v_u64 (ThresExp)
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#define VecSmallPowX v_u64 (SmallPowX)
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#define VecThresPowX v_u64 (ThresPowX)
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#define VecSmallPowY v_u64 (SmallPowY)
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@ -32,36 +29,48 @@
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static const struct data
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{
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float64x2_t log_poly[6];
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float64x2_t exp_poly[3];
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float64x2_t ln2_hi, ln2_lo;
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float64x2_t shift, inv_ln2_n, ln2_hi_n, ln2_lo_n, small_powx;
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uint64x2_t inf;
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float64x2_t small_powx;
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uint64x2_t offset, mask;
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uint64x2_t mask_sub_0, mask_sub_1;
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float64x2_t log_c0, log_c2, log_c4, log_c5;
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double log_c1, log_c3;
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double ln2_lo, ln2_hi;
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uint64x2_t small_exp, thres_exp;
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double ln2_lo_n, ln2_hi_n;
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double inv_ln2_n, exp_c2;
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float64x2_t exp_c0, exp_c1;
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} data = {
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/* Power threshold. */
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.inf = V2 (0x7ff0000000000000),
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.small_powx = V2 (0x1p-126),
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.offset = V2 (Off),
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.mask = V2 (0xfffULL << 52),
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.mask_sub_0 = V2 (1ULL << 52),
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.mask_sub_1 = V2 (52ULL << 52),
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/* Coefficients copied from v_pow_log_data.c
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relative error: 0x1.11922ap-70 in [-0x1.6bp-8, 0x1.6bp-8]
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Coefficients are scaled to match the scaling during evaluation. */
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.log_poly
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= { V2 (0x1.555555555556p-2 * -2), V2 (-0x1.0000000000006p-2 * -2),
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V2 (0x1.999999959554ep-3 * 4), V2 (-0x1.555555529a47ap-3 * 4),
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V2 (0x1.2495b9b4845e9p-3 * -8), V2 (-0x1.0002b8b263fc3p-3 * -8) },
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.ln2_hi = V2 (0x1.62e42fefa3800p-1),
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.ln2_lo = V2 (0x1.ef35793c76730p-45),
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.log_c0 = V2 (0x1.555555555556p-2 * -2),
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.log_c1 = -0x1.0000000000006p-2 * -2,
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.log_c2 = V2 (0x1.999999959554ep-3 * 4),
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.log_c3 = -0x1.555555529a47ap-3 * 4,
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.log_c4 = V2 (0x1.2495b9b4845e9p-3 * -8),
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.log_c5 = V2 (-0x1.0002b8b263fc3p-3 * -8),
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.ln2_hi = 0x1.62e42fefa3800p-1,
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.ln2_lo = 0x1.ef35793c76730p-45,
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/* Polynomial coefficients: abs error: 1.43*2^-58, ulp error: 0.549
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(0.550 without fma) if |x| < ln2/512. */
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.exp_poly = { V2 (0x1.fffffffffffd4p-2), V2 (0x1.5555571d6ef9p-3),
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V2 (0x1.5555576a5adcep-5) },
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.shift = V2 (0x1.8p52), /* round to nearest int. without intrinsics. */
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.inv_ln2_n = V2 (0x1.71547652b82fep8), /* N/ln2. */
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.ln2_hi_n = V2 (0x1.62e42fefc0000p-9), /* ln2/N. */
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.ln2_lo_n = V2 (-0x1.c610ca86c3899p-45),
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.small_powx = V2 (0x1p-126),
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.inf = V2 (0x7ff0000000000000)
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.exp_c0 = V2 (0x1.fffffffffffd4p-2),
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.exp_c1 = V2 (0x1.5555571d6ef9p-3),
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.exp_c2 = 0x1.5555576a5adcep-5,
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.small_exp = V2 (0x3c90000000000000),
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.thres_exp = V2 (0x03f0000000000000),
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.inv_ln2_n = 0x1.71547652b82fep8, /* N/ln2. */
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.ln2_hi_n = 0x1.62e42fefc0000p-9, /* ln2/N. */
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.ln2_lo_n = -0x1.c610ca86c3899p-45,
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};
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#define A(i) data.log_poly[i]
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#define C(i) data.exp_poly[i]
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/* This version implements an algorithm close to scalar pow but
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- does not implement the trick in the exp's specialcase subroutine to avoid
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double-rounding,
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@ -91,10 +100,9 @@ v_log_inline (uint64x2_t ix, float64x2_t *tail, const struct data *d)
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/* x = 2^k z; where z is in range [OFF,2*OFF) and exact.
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The range is split into N subintervals.
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The ith subinterval contains z and c is near its center. */
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uint64x2_t tmp = vsubq_u64 (ix, v_u64 (Off));
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int64x2_t k
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= vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); /* arithmetic shift. */
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uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, v_u64 (0xfffULL << 52)));
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uint64x2_t tmp = vsubq_u64 (ix, d->offset);
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int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52);
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uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, d->mask));
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float64x2_t z = vreinterpretq_f64_u64 (iz);
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float64x2_t kd = vcvtq_f64_s64 (k);
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/* log(x) = k*Ln2 + log(c) + log1p(z/c-1). */
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@ -105,9 +113,10 @@ v_log_inline (uint64x2_t ix, float64x2_t *tail, const struct data *d)
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|z/c - 1| < 1/N, so r = z/c - 1 is exactly representible. */
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float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, invc);
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/* k*Ln2 + log(c) + r. */
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float64x2_t t1 = vfmaq_f64 (logc, kd, d->ln2_hi);
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float64x2_t ln2 = vld1q_f64 (&d->ln2_lo);
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float64x2_t t1 = vfmaq_laneq_f64 (logc, kd, ln2, 1);
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float64x2_t t2 = vaddq_f64 (t1, r);
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float64x2_t lo1 = vfmaq_f64 (logctail, kd, d->ln2_lo);
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float64x2_t lo1 = vfmaq_laneq_f64 (logctail, kd, ln2, 0);
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float64x2_t lo2 = vaddq_f64 (vsubq_f64 (t1, t2), r);
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/* Evaluation is optimized assuming superscalar pipelined execution. */
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float64x2_t ar = vmulq_f64 (v_f64 (-0.5), r);
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@ -118,9 +127,10 @@ v_log_inline (uint64x2_t ix, float64x2_t *tail, const struct data *d)
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float64x2_t lo3 = vfmaq_f64 (vnegq_f64 (ar2), ar, r);
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float64x2_t lo4 = vaddq_f64 (vsubq_f64 (t2, hi), ar2);
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/* p = log1p(r) - r - A[0]*r*r. */
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float64x2_t a56 = vfmaq_f64 (A (4), r, A (5));
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float64x2_t a34 = vfmaq_f64 (A (2), r, A (3));
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float64x2_t a12 = vfmaq_f64 (A (0), r, A (1));
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float64x2_t odd_coeffs = vld1q_f64 (&d->log_c1);
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float64x2_t a56 = vfmaq_f64 (d->log_c4, r, d->log_c5);
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float64x2_t a34 = vfmaq_laneq_f64 (d->log_c2, r, odd_coeffs, 1);
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float64x2_t a12 = vfmaq_laneq_f64 (d->log_c0, r, odd_coeffs, 0);
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float64x2_t p = vfmaq_f64 (a34, ar2, a56);
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p = vfmaq_f64 (a12, ar2, p);
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p = vmulq_f64 (ar3, p);
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@ -140,28 +150,28 @@ exp_special_case (float64x2_t x, float64x2_t xtail)
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/* Computes sign*exp(x+xtail) where |xtail| < 2^-8/N and |xtail| <= |x|. */
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static inline float64x2_t
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v_exp_inline (float64x2_t x, float64x2_t xtail, const struct data *d)
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v_exp_inline (float64x2_t x, float64x2_t neg_xtail, const struct data *d)
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{
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/* Fallback to scalar exp_inline for all lanes if any lane
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contains value of x s.t. |x| <= 2^-54 or >= 512. */
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uint64x2_t abstop
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= vshrq_n_u64 (vandq_u64 (vreinterpretq_u64_f64 (x), d->inf), 52);
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uint64x2_t uoflowx
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= vcgeq_u64 (vsubq_u64 (abstop, VecSmallExp), VecThresExp);
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uint64x2_t uoflowx = vcgeq_u64 (
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vsubq_u64 (vreinterpretq_u64_f64 (vabsq_f64 (x)), d->small_exp),
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d->thres_exp);
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if (__glibc_unlikely (v_any_u64 (uoflowx)))
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return exp_special_case (x, xtail);
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return exp_special_case (x, vnegq_f64 (neg_xtail));
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/* exp(x) = 2^(k/N) * exp(r), with exp(r) in [2^(-1/2N),2^(1/2N)]. */
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/* x = ln2/N*k + r, with k integer and r in [-ln2/2N, ln2/2N]. */
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float64x2_t z = vmulq_f64 (d->inv_ln2_n, x);
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/* z - kd is in [-1, 1] in non-nearest rounding modes. */
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float64x2_t kd = vaddq_f64 (z, d->shift);
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uint64x2_t ki = vreinterpretq_u64_f64 (kd);
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kd = vsubq_f64 (kd, d->shift);
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float64x2_t r = vfmsq_f64 (x, kd, d->ln2_hi_n);
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r = vfmsq_f64 (r, kd, d->ln2_lo_n);
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float64x2_t exp_consts = vld1q_f64 (&d->inv_ln2_n);
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float64x2_t z = vmulq_laneq_f64 (x, exp_consts, 0);
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float64x2_t kd = vrndnq_f64 (z);
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uint64x2_t ki = vreinterpretq_u64_s64 (vcvtaq_s64_f64 (z));
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float64x2_t ln2_n = vld1q_f64 (&d->ln2_lo_n);
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float64x2_t r = vfmsq_laneq_f64 (x, kd, ln2_n, 1);
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r = vfmsq_laneq_f64 (r, kd, ln2_n, 0);
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/* The code assumes 2^-200 < |xtail| < 2^-8/N. */
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r = vaddq_f64 (r, xtail);
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r = vsubq_f64 (r, neg_xtail);
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/* 2^(k/N) ~= scale. */
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uint64x2_t idx = vandq_u64 (ki, v_u64 (N_EXP - 1));
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uint64x2_t top = vshlq_n_u64 (ki, 52 - V_POW_EXP_TABLE_BITS);
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@ -170,8 +180,8 @@ v_exp_inline (float64x2_t x, float64x2_t xtail, const struct data *d)
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sbits = vaddq_u64 (sbits, top);
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/* exp(x) = 2^(k/N) * exp(r) ~= scale + scale * (exp(r) - 1). */
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float64x2_t r2 = vmulq_f64 (r, r);
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float64x2_t tmp = vfmaq_f64 (C (1), r, C (2));
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tmp = vfmaq_f64 (C (0), r, tmp);
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float64x2_t tmp = vfmaq_laneq_f64 (d->exp_c1, r, exp_consts, 1);
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tmp = vfmaq_f64 (d->exp_c0, r, tmp);
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tmp = vfmaq_f64 (r, r2, tmp);
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float64x2_t scale = vreinterpretq_f64_u64 (sbits);
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/* Note: tmp == 0 or |tmp| > 2^-200 and scale > 2^-739, so there
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@ -230,8 +240,8 @@ float64x2_t VPCS_ATTR V_NAME_D2 (pow) (float64x2_t x, float64x2_t y)
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{
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/* Normalize subnormal x so exponent becomes negative. */
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uint64x2_t vix_norm = vreinterpretq_u64_f64 (
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vabsq_f64 (vmulq_f64 (x, vcvtq_f64_u64 (v_u64 (1ULL << 52)))));
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vix_norm = vsubq_u64 (vix_norm, v_u64 (52ULL << 52));
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vabsq_f64 (vmulq_f64 (x, vcvtq_f64_u64 (d->mask_sub_0))));
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vix_norm = vsubq_u64 (vix_norm, d->mask_sub_1);
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vix = vbslq_u64 (sub_x, vix_norm, vix);
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}
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}
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@ -242,8 +252,7 @@ float64x2_t VPCS_ATTR V_NAME_D2 (pow) (float64x2_t x, float64x2_t y)
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/* Vector Exp(y_loghi, y_loglo). */
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float64x2_t vehi = vmulq_f64 (y, vhi);
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float64x2_t velo = vmulq_f64 (y, vlo);
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float64x2_t vemi = vfmsq_f64 (vehi, y, vhi);
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velo = vsubq_f64 (velo, vemi);
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return v_exp_inline (vehi, velo, d);
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float64x2_t neg_velo = vfmsq_f64 (vemi, y, vlo);
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return v_exp_inline (vehi, neg_velo, d);
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}
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