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Update.
2004-03-13 Jakub Jelinek <jakub@redhat.com> * sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Add const. (handle_amd): New function. (__sysconf): Handle _SC_LEVEL4_CACHE_LINESIZE here, not in linux_sysconf. Call handle_amd on AuthenticAMD. * sysdeps/unix/sysv/linux/x86_64/sysconf.c: Likewise.
This commit is contained in:
Ulrich Drepper
parent
b3e09193c5
commit
58101473df
@ -1,3 +1,11 @@
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2004-03-13 Jakub Jelinek <jakub@redhat.com>
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* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Add const.
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(handle_amd): New function.
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(__sysconf): Handle _SC_LEVEL4_CACHE_LINESIZE here, not in
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linux_sysconf. Call handle_amd on AuthenticAMD.
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* sysdeps/unix/sysv/linux/x86_64/sysconf.c: Likewise.
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2004-03-14 Ulrich Drepper <drepper@redhat.com>
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* wcsmbs/mbsrtowcs.c: Just a wrapper around __mbsrtowcs_l.
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@ -65,7 +65,7 @@ handle_i486 (int name)
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}
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static struct intel_02_cache_info
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static const struct intel_02_cache_info
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{
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unsigned int idx;
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int name;
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@ -250,12 +250,81 @@ handle_intel (int name, unsigned int maxidx)
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}
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static long int
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handle_amd (int name)
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{
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unsigned int eax;
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unsigned int ebx;
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unsigned int ecx;
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unsigned int edx;
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (0x80000000));
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if (name >= _SC_LEVEL3_CACHE_SIZE)
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return 0;
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unsigned int fn = 0x80000005 + (name >= _SC_LEVEL2_CACHE_SIZE);
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if (eax < fn)
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return 0;
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (fn));
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if (name < _SC_LEVEL1_DCACHE_SIZE)
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{
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name += _SC_LEVEL1_DCACHE_SIZE - _SC_LEVEL1_ICACHE_SIZE;
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ecx = edx;
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}
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switch (name)
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{
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case _SC_LEVEL1_DCACHE_SIZE:
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return (ecx >> 14) & 0x3fc00;
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case _SC_LEVEL1_DCACHE_ASSOC:
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ecx >>= 16;
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if ((ecx & 0xff) == 0xff)
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/* Fully associative. */
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return (ecx << 2) & 0x3fc00;
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return ecx & 0xff;
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case _SC_LEVEL1_DCACHE_LINESIZE:
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return ecx & 0xff;
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case _SC_LEVEL2_CACHE_SIZE:
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return (ecx & 0xf000) == 0 ? 0 : (ecx >> 6) & 0x3fffc00;
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case _SC_LEVEL2_CACHE_ASSOC:
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ecx >>= 12;
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switch (ecx & 0xf)
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{
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case 0:
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case 1:
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case 2:
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case 4:
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return ecx & 0xf;
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case 6:
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return 8;
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case 8:
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return 16;
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case 0xf:
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return (ecx << 6) & 0x3fffc00;
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default:
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return 0;
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}
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case _SC_LEVEL2_CACHE_LINESIZE:
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return (ecx & 0xf000) == 0 ? 0 : ecx & 0xff;
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default:
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assert (! "cannot happen");
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}
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return -1;
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}
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/* Get the value of the system variable NAME. */
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long int
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__sysconf (int name)
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{
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/* We only handle the cache information here (for now). */
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if (name < _SC_LEVEL1_ICACHE_SIZE || name > _SC_LEVEL4_CACHE_ASSOC)
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if (name < _SC_LEVEL1_ICACHE_SIZE || name > _SC_LEVEL4_CACHE_LINESIZE)
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return linux_sysconf (name);
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/* Recognize i386 and compatible. These don't have any cache on
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@ -299,6 +368,11 @@ __sysconf (int name)
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/* This spells out "GenuineIntel". */
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if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
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return handle_intel (name, eax);
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/* This spells out "AuthenticAMD". */
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if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
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return handle_amd (name);
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// XXX Fill in more vendors.
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/* CPU not known, we have no information. */
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@ -26,7 +26,7 @@
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static long int linux_sysconf (int name);
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static struct intel_02_cache_info
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static const struct intel_02_cache_info
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{
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unsigned int idx;
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int name;
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@ -206,12 +206,81 @@ handle_intel (int name, unsigned int maxidx)
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}
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static long int
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handle_amd (int name)
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{
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unsigned int eax;
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unsigned int ebx;
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unsigned int ecx;
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unsigned int edx;
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (0x80000000));
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if (name >= _SC_LEVEL3_CACHE_SIZE)
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return 0;
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unsigned int fn = 0x80000005 + (name >= _SC_LEVEL2_CACHE_SIZE);
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if (eax < fn)
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return 0;
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (fn));
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if (name < _SC_LEVEL1_DCACHE_SIZE)
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{
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name += _SC_LEVEL1_DCACHE_SIZE - _SC_LEVEL1_ICACHE_SIZE;
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ecx = edx;
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}
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switch (name)
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{
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case _SC_LEVEL1_DCACHE_SIZE:
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return (ecx >> 14) & 0x3fc00;
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case _SC_LEVEL1_DCACHE_ASSOC:
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ecx >>= 16;
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if ((ecx & 0xff) == 0xff)
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/* Fully associative. */
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return (ecx << 2) & 0x3fc00;
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return ecx & 0xff;
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case _SC_LEVEL1_DCACHE_LINESIZE:
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return ecx & 0xff;
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case _SC_LEVEL2_CACHE_SIZE:
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return (ecx & 0xf000) == 0 ? 0 : (ecx >> 6) & 0x3fffc00;
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case _SC_LEVEL2_CACHE_ASSOC:
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ecx >>= 12;
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switch (ecx & 0xf)
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{
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case 0:
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case 1:
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case 2:
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case 4:
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return ecx & 0xf;
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case 6:
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return 8;
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case 8:
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return 16;
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case 0xf:
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return (ecx << 6) & 0x3fffc00;
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default:
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return 0;
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}
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case _SC_LEVEL2_CACHE_LINESIZE:
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return (ecx & 0xf000) == 0 ? 0 : ecx & 0xff;
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default:
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assert (! "cannot happen");
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}
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return -1;
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}
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/* Get the value of the system variable NAME. */
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long int
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__sysconf (int name)
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{
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/* We only handle the cache information here (for now). */
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if (name < _SC_LEVEL1_ICACHE_SIZE || name > _SC_LEVEL4_CACHE_ASSOC)
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if (name < _SC_LEVEL1_ICACHE_SIZE || name > _SC_LEVEL4_CACHE_LINESIZE)
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return linux_sysconf (name);
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/* Find out what brand of processor. */
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@ -226,6 +295,11 @@ __sysconf (int name)
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/* This spells out "GenuineIntel". */
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if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
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return handle_intel (name, eax);
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/* This spells out "AuthenticAMD". */
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if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
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return handle_amd (name);
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// XXX Fill in more vendors.
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/* CPU not known, we have no information. */
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