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* sysdeps/x86_64/cacheinfo.c (init_cacheinfo): Work around problem
with some Pentium Ds.
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@ -1,3 +1,8 @@
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2007-10-09 Ulrich Drepper <drepper@redhat.com>
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* sysdeps/x86_64/cacheinfo.c (init_cacheinfo): Work around problem
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with some Pentium Ds.
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2007-10-08 Ulrich Drepper <drepper@redhat.com>
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* sysdeps/unix/sysv/linux/eventfd_read.c (eventfd_read): Use
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@ -120,7 +120,6 @@ day "<U0053><U006F><U006E><U006E><U0074><U0061><U0067>";/
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"<U0044><U006F><U006E><U006E><U0065><U0072><U0073><U0074><U0061><U0067>";/
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"<U0046><U0072><U0065><U0069><U0074><U0061><U0067>";/
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"<U0053><U0061><U006D><U0073><U0074><U0061><U0067>"
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week 7;19971201;4
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abmon "<U004A><U0061><U006E>";"<U0046><U0065><U0062>";/
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"<U004D><U00E4><U0072>";"<U0041><U0070><U0072>";/
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"<U004D><U0061><U0069>";"<U004A><U0075><U006E>";/
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@ -456,6 +456,13 @@ init_cacheinfo (void)
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asm volatile ("cpuid"
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: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (4), "2" (i++));
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/* There seems to be a bug in at least some Pentium Ds
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which sometimes fail to iterate all cache parameters.
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Do not loop indefinitely here, stop in this case and
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assume there is no such information. */
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if ((eax & 0x1f) == 0)
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goto intel_bug_no_cache_info;
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}
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while (((eax >> 5) & 0x7) != level);
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@ -463,6 +470,7 @@ init_cacheinfo (void)
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}
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else
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{
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intel_bug_no_cache_info:
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/* Assume that all logical threads share the highest cache level. */
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asm volatile ("cpuid"
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: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
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