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Use x86_64 bits/{debugreg,reg}.h for i386 and x86-64
This commit is contained in:
H.J. Lu
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68e408ab5d
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2012-06-04 H.J. Lu <hongjiu.lu@intel.com>
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[BZ #14117]
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* sysdeps/unix/sysv/linux/i386/sys/debugreg.h: Removed.
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* sysdeps/unix/sysv/linux/i386/sys/reg.h: Likewise.
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* sysdeps/unix/sysv/linux/x86_64/sys/debugreg.h: Renamed to ...
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* sysdeps/unix/sysv/linux/x86/sys/debugreg.h: This.
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* sysdeps/unix/sysv/linux/x86_64/sys/reg.h: Renamed to ...
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* sysdeps/unix/sysv/linux/x86/sys/reg.h: This.
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* sysdeps/unix/sysv/linux/i386/sys/io.h: Removed.
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* sysdeps/unix/sysv/linux/x86_64/sys/io.h: Renamed to ...
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* sysdeps/unix/sysv/linux/x86/sys/io.h: This.
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@ -1,90 +0,0 @@
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/* Copyright (C) 1998, 2000 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _SYS_DEBUGREG_H
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#define _SYS_DEBUGREG_H 1
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/* Indicate the register numbers for a number of the specific
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debug registers. Registers 0-3 contain the addresses we wish to trap on */
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#define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */
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#define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */
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#define DR_STATUS 6 /* u_debugreg[DR_STATUS] */
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#define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */
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/* Define a few things for the status register. We can use this to determine
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which debugging register was responsible for the trap. The other bits
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are either reserved or not of interest to us. */
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#define DR_TRAP0 (0x1) /* db0 */
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#define DR_TRAP1 (0x2) /* db1 */
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#define DR_TRAP2 (0x4) /* db2 */
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#define DR_TRAP3 (0x8) /* db3 */
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#define DR_STEP (0x4000) /* single-step */
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#define DR_SWITCH (0x8000) /* task switch */
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/* Now define a bunch of things for manipulating the control register.
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The top two bytes of the control register consist of 4 fields of 4
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bits - each field corresponds to one of the four debug registers,
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and indicates what types of access we trap on, and how large the data
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field is that we are looking at */
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#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
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#define DR_CONTROL_SIZE 4 /* 4 control bits per register */
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#define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */
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#define DR_RW_WRITE (0x1)
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#define DR_RW_READ (0x3)
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#define DR_LEN_1 (0x0) /* Settings for data length to trap on */
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#define DR_LEN_2 (0x4)
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#define DR_LEN_4 (0xC)
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/* The low byte to the control register determine which registers are
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enabled. There are 4 fields of two bits. One bit is "local", meaning
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that the processor will reset the bit after a task switch and the other
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is global meaning that we have to explicitly reset the bit. With linux,
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you can use either one, since we explicitly zero the register when we enter
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kernel mode. */
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#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */
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#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */
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#define DR_ENABLE_SIZE 2 /* 2 enable bits per register */
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#define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */
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#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
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/* The second byte to the control register has a few special things.
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On the i386, you should set the DR_LOCAL_SLOWDOWN or
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DR_GLOBAL_SLOWDOWN bits if you want to know exactly which
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instruction triggered the watchpoint. Setting these bits causes
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the processor to run more slowly, but leaving them clear makes it
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treat watchpoint hits as imprecise exceptions, so you can't
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reliably determine which instruction caused the hit.
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The i486 and all later IA-32 processors ignore DR_LOCAL_SLOWDOWN
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and DR_GLOBAL_SLOWDOWN. They always report the exception
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precisely, except in some rare cases, which the user can't do
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anything about. */
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#define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */
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#define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */
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#define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */
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#endif /* sys/debugreg.h */
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@ -1,42 +0,0 @@
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/* Copyright (C) 1998 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _SYS_REG_H
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#define _SYS_REG_H 1
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/* Index into an array of 4 byte integers returned from ptrace for
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* location of the users' stored general purpose registers. */
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#define EBX 0
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#define ECX 1
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#define EDX 2
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#define ESI 3
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#define EDI 4
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#define EBP 5
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#define EAX 6
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#define DS 7
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#define ES 8
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#define FS 9
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#define GS 10
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#define ORIG_EAX 11
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#define EIP 12
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#define CS 13
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#define EFL 14
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#define UESP 15
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#define SS 16
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#endif /* _SYS_REG_H */
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