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x86-64: Allocate state buffer space for RDI, RSI and RBX
_dl_tlsdesc_dynamic preserves RDI, RSI and RBX before realigning stack. After realigning stack, it saves RCX, RDX, R8, R9, R10 and R11. Define TLSDESC_CALL_REGISTER_SAVE_AREA to allocate space for RDI, RSI and RBX to avoid clobbering saved RDI, RSI and RBX values on stack by xsave to STATE_SAVE_OFFSET(%rsp). +==================+<- stack frame start aligned at 8 or 16 bytes | |<- RDI saved in the red zone | |<- RSI saved in the red zone | |<- RBX saved in the red zone | |<- paddings for stack realignment of 64 bytes |------------------|<- xsave buffer end aligned at 64 bytes | |<- | |<- | |<- |------------------|<- xsave buffer start at STATE_SAVE_OFFSET(%rsp) | |<- 8-byte padding for 64-byte alignment | |<- 8-byte padding for 64-byte alignment | |<- R11 | |<- R10 | |<- R9 | |<- R8 | |<- RDX | |<- RCX +==================+<- RSP aligned at 64 bytes Define TLSDESC_CALL_REGISTER_SAVE_AREA, the total register save area size for all integer registers by adding 24 to STATE_SAVE_OFFSET since RDI, RSI and RBX are saved onto stack without adjusting stack pointer first, using the red-zone. This fixes BZ #31501. Reviewed-by: Sunil K Pandey <skpgkp2@gmail.com>
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@ -311,7 +311,7 @@ update_active (struct cpu_features *cpu_features)
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/* NB: On AMX capable processors, ebx always includes AMX
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states. */
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unsigned int xsave_state_full_size
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= ALIGN_UP (ebx + STATE_SAVE_OFFSET, 64);
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= ALIGN_UP (ebx + TLSDESC_CALL_REGISTER_SAVE_AREA, 64);
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cpu_features->xsave_state_size
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= xsave_state_full_size;
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@ -401,8 +401,10 @@ update_active (struct cpu_features *cpu_features)
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unsigned int amx_size
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= (xstate_amx_comp_offsets[31]
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+ xstate_amx_comp_sizes[31]);
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amx_size = ALIGN_UP (amx_size + STATE_SAVE_OFFSET,
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64);
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amx_size
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= ALIGN_UP ((amx_size
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+ TLSDESC_CALL_REGISTER_SAVE_AREA),
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64);
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/* Set xsave_state_full_size to the compact AMX
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state size for XSAVEC. NB: xsave_state_full_size
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is only used in _dl_tlsdesc_dynamic_xsave and
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@ -410,7 +412,8 @@ update_active (struct cpu_features *cpu_features)
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cpu_features->xsave_state_full_size = amx_size;
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#endif
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cpu_features->xsave_state_size
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= ALIGN_UP (size + STATE_SAVE_OFFSET, 64);
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= ALIGN_UP (size + TLSDESC_CALL_REGISTER_SAVE_AREA,
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64);
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CPU_FEATURE_SET (cpu_features, XSAVEC);
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}
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}
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@ -38,14 +38,59 @@
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#ifdef __x86_64__
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/* Offset for fxsave/xsave area used by _dl_runtime_resolve. Also need
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space to preserve RCX, RDX, RSI, RDI, R8, R9 and RAX. It must be
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aligned to 16 bytes for fxsave and 64 bytes for xsave.
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aligned to 16 bytes for fxsave and 64 bytes for xsave. It is non-zero
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because MOV, instead of PUSH, is used to save registers onto stack.
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NB: Is is non-zero because of the 128-byte red-zone. Some registers
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are saved on stack without adjusting stack pointer first. When we
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update stack pointer to allocate more space, we need to take the
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red-zone into account. */
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+==================+<- stack frame start aligned at 8 or 16 bytes
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| |<- paddings for stack realignment of 64 bytes
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|------------------|<- xsave buffer end aligned at 64 bytes
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| |<-
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| |<-
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| |<-
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|------------------|<- xsave buffer start at STATE_SAVE_OFFSET(%rsp)
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| |<- 8-byte padding for 64-byte alignment
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| |<- R9
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| |<- R8
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| |<- RDI
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| |<- RSI
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| |<- RDX
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| |<- RCX
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| |<- RAX
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+==================+<- RSP aligned at 64 bytes
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*/
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# define STATE_SAVE_OFFSET (8 * 7 + 8)
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/* _dl_tlsdesc_dynamic preserves RDI, RSI and RBX before realigning
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stack. After realigning stack, it saves RCX, RDX, R8, R9, R10 and
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R11. Allocate space for RDI, RSI and RBX to avoid clobbering saved
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RDI, RSI and RBX values on stack by xsave.
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+==================+<- stack frame start aligned at 8 or 16 bytes
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| |<- RDI saved in the red zone
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| |<- RSI saved in the red zone
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| |<- RBX saved in the red zone
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| |<- paddings for stack realignment of 64 bytes
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|------------------|<- xsave buffer end aligned at 64 bytes
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| |<-
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| |<-
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| |<-
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|------------------|<- xsave buffer start at STATE_SAVE_OFFSET(%rsp)
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| |<- 8-byte padding for 64-byte alignment
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| |<- 8-byte padding for 64-byte alignment
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| |<- R11
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| |<- R10
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| |<- R9
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| |<- R8
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| |<- RDX
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| |<- RCX
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+==================+<- RSP aligned at 64 bytes
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Define the total register save area size for all integer registers by
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adding 24 to STATE_SAVE_OFFSET since RDI, RSI and RBX are saved onto
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stack without adjusting stack pointer first, using the red-zone. */
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# define TLSDESC_CALL_REGISTER_SAVE_AREA (STATE_SAVE_OFFSET + 24)
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/* Save SSE, AVX, AVX512, mask, bound and APX registers. Bound and APX
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registers are mutually exclusive. */
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# define STATE_SAVE_MASK \
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@ -66,8 +111,9 @@
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(STATE_SAVE_MASK | AMX_STATE_SAVE_MASK)
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#else
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/* Offset for fxsave/xsave area used by _dl_tlsdesc_dynamic. Since i386
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doesn't have red-zone, use 0 here. */
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uses PUSH to save registers onto stack, use 0 here. */
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# define STATE_SAVE_OFFSET 0
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# define TLSDESC_CALL_REGISTER_SAVE_AREA 0
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/* Save SSE, AVX, AXV512, mask and bound registers. */
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# define STATE_SAVE_MASK \
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87
sysdeps/x86_64/tst-gnu2-tls2mod1.S
Normal file
87
sysdeps/x86_64/tst-gnu2-tls2mod1.S
Normal file
@ -0,0 +1,87 @@
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/* Check if TLSDESC relocation preserves %rdi, %rsi and %rbx.
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* On AVX512 machines, OFFSET == 40 caused _dl_tlsdesc_dynamic_xsavec
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to clobber %rdi, %rsi and %rbx. On Intel AVX CPUs, the state size
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is 960 bytes and this test didn't fail. It may be due to the unused
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last 128 bytes. On AMD AVX CPUs, the state size is 832 bytes and
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this test might fail without the fix. */
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#ifndef OFFSET
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# define OFFSET 40
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#endif
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.text
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.p2align 4
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.globl apply_tls
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.type apply_tls, @function
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apply_tls:
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cfi_startproc
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_CET_ENDBR
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pushq %rbp
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cfi_def_cfa_offset (16)
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cfi_offset (6, -16)
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movdqu (%RDI_LP), %xmm0
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lea tls_var1@TLSDESC(%rip), %RAX_LP
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mov %RSP_LP, %RBP_LP
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cfi_def_cfa_register (6)
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/* Align stack to 64 bytes. */
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and $-64, %RSP_LP
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sub $OFFSET, %RSP_LP
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pushq %rbx
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/* Set %ebx to 0xbadbeef. */
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movl $0xbadbeef, %ebx
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movl $0xbadbeef, %esi
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movq %rdi, saved_rdi(%rip)
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movq %rsi, saved_rsi(%rip)
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call *tls_var1@TLSCALL(%RAX_LP)
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/* Check if _dl_tlsdesc_dynamic preserves %rdi, %rsi and %rbx. */
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cmpq saved_rdi(%rip), %rdi
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jne L(hlt)
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cmpq saved_rsi(%rip), %rsi
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jne L(hlt)
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cmpl $0xbadbeef, %ebx
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jne L(hlt)
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add %fs:0, %RAX_LP
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movups %xmm0, 32(%RAX_LP)
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movdqu 16(%RDI_LP), %xmm1
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mov %RAX_LP, %RBX_LP
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movups %xmm1, 48(%RAX_LP)
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lea 32(%RBX_LP), %RAX_LP
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pop %rbx
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leave
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cfi_def_cfa (7, 8)
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ret
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L(hlt):
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hlt
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cfi_endproc
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.size apply_tls, .-apply_tls
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.hidden tls_var1
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.globl tls_var1
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.section .tbss,"awT",@nobits
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.align 16
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.type tls_var1, @object
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.size tls_var1, 3200
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tls_var1:
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.zero 3200
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.local saved_rdi
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.comm saved_rdi,8,8
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.local saved_rsi
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.comm saved_rsi,8,8
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.section .note.GNU-stack,"",@progbits
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