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Revert "powerpc: PPCA2 optimized memcpy function"
This reverts commit 44f91d3884.
Conflicts:
ChangeLog
This commit is contained in:
Ulrich Drepper
parent
c21cc9bcb3
commit
724da3d7f4
@ -9,15 +9,6 @@
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* debug/stack_chk_fail_local.c: Add missing licence exception.
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* debug/warning-nop.c: Likewise.
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2010-09-15 Michael B. Brutman <brutman@us.ibm.com>
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* sysdeps/powerpc/powerpc32/ppca2/memcpy.S: New file.
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* sysdeps/powerpc/powerpc64/ppca2/memcpy.S: New file.
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* sysdeps/unix/sysv/linux/powerpc/powerpc32/ppca2/fpu/Implies: New
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submachine.
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* sysdeps/unix/sysv/linux/powerpc/powerpc64/ppca2/fpu/Implies:
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Likewise.
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2010-09-15 Joseph Myers <joseph@codesourcery.com>
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* sysdeps/unix/sysv/linux/getdents.c (__GETDENTS): When
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@ -1,511 +0,0 @@
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/* Optimized memcpy implementation for PowerPC A2.
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Copyright (C) 2010 Free Software Foundation, Inc.
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Contributed by Michael Brutman <brutman@us.ibm.com>.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <sysdep.h>
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#include <bp-sym.h>
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#include <bp-asm.h>
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#define PREFETCH_AHEAD 4 /* no cache lines SRC prefetching ahead */
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#define ZERO_AHEAD 2 /* no cache lines DST zeroing ahead */
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.machine ppca2
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EALIGN (BP_SYM (memcpy), 5, 0)
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CALL_MCOUNT
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dcbt 0,r4 /* Prefetch ONE SRC cacheline */
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cmplwi cr1,r5,16 /* is size < 16 ? */
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mr r6,r3 /* Copy dest reg to r6; */
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blt+ cr1,L(shortcopy)
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/* Big copy (16 bytes or more)
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Figure out how far to the nearest quadword boundary, or if we are
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on one already.
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r3 - return value (always)
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r4 - current source addr
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r5 - copy length
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r6 - current dest addr
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*/
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neg r8,r3 /* LS 4 bits = # bytes to 8-byte dest bdry */
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clrlwi r8,r8,32-4 /* align to 16byte boundary */
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sub r7,r4,r3 /* compute offset to src from dest */
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cmplwi cr0,r8,0 /* Were we aligned on a 16 byte bdy? */
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beq+ L(dst_aligned)
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/* Destination is not aligned on quadword boundary. Get us to one.
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r3 - return value (always)
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r4 - current source addr
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r5 - copy length
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r6 - current dest addr
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r7 - offset to src from dest
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r8 - number of bytes to quadword boundary
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*/
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mtcrf 0x01,r8 /* put #bytes to boundary into cr7 */
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subf r5,r8,r5 /* adjust remaining len */
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bf cr7*4+3,1f
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lbzx r0,r7,r6 /* copy 1 byte addr */
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stb r0,0(r6)
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addi r6,r6,1
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1:
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bf cr7*4+2,2f
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lhzx r0,r7,r6 /* copy 2 byte addr */
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sth r0,0(r6)
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addi r6,r6,2
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2:
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bf cr7*4+1,4f
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lwzx r0,r7,r6 /* copy 4 byte addr */
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stw r0,0(r6)
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addi r6,r6,4
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4:
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bf cr7*4+0,8f
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lfdx r0,r7,r6 /* copy 8 byte addr */
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stfd r0,0(r6)
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addi r6,r6,8
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8:
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add r4,r7,r6 /* update src addr */
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/* Dest is quadword aligned now.
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Lots of decisions to make. If we are copying less than a cache
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line we won't be here long. If we are not on a cache line
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boundary we need to get there. And then we need to figure out
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how many cache lines ahead to pre-touch.
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r3 - return value (always)
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r4 - current source addr
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r5 - copy length
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r6 - current dest addr
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*/
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.align 4
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L(dst_aligned):
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#ifdef SHARED
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mflr r0
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/* Establishes GOT addressability so we can load __cache_line_size
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from static. This value was set from the aux vector during startup. */
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bcl 20,31,1f
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1:
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mflr r9
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addis r9,r9,__cache_line_size-1b@ha
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lwz r9,__cache_line_size-1b@l(r9)
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mtlr r0
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#else
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/* Load __cache_line_size from static. This value was set from the
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aux vector during startup. */
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lis r9,__cache_line_size@ha
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lwz r9,__cache_line_size@l(r9)
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#endif
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cmplwi cr5, r9, 0
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bne+ cr5,L(cachelineset)
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li r9,64
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L(cachelineset):
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addi r10,r9,-1
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cmpw cr5,r5,r10 /* Less than a cacheline to go? */
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neg r7,r6 /* How far to next cacheline bdy? */
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addi r6,r6,-8 /* prepare for stdu */
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cmpwi cr0,r9,128
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addi r4,r4,-8 /* prepare for ldu */
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ble+ cr5,L(lessthancacheline)
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beq- cr0,L(big_lines) /* 128 byte line code */
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/* More than a cacheline left to go, and using 64 byte cachelines */
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clrlwi r7,r7,32-6 /* How far to next cacheline bdy? */
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cmplwi cr6,r7,0 /* Are we on a cacheline bdy already? */
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/* Reduce total len by what it takes to get to the next cache line */
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subf r5,r7,r5
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srwi r7,r7,4 /* How many qws to get to the line bdy? */
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/* How many full cache lines to copy after getting to a line bdy? */
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srwi r10,r5,6
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cmplwi r10,0 /* If no full cache lines to copy ... */
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li r11,0 /* number cachelines to copy with prefetch */
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beq L(nocacheprefetch)
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/* We are here because we have at least one full cache line to copy,
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and therefore some pre-touching to do. */
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cmplwi r10,PREFETCH_AHEAD
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li r12,64+8 /* prefetch distance */
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ble L(lessthanmaxprefetch)
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/* We can only do so much pre-fetching. R11 will have the count of
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lines left to prefetch after the initial batch of prefetches
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are executed. */
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subi r11,r10,PREFETCH_AHEAD
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li r10,PREFETCH_AHEAD
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L(lessthanmaxprefetch):
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mtctr r10
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/* At this point r10/ctr hold the number of lines to prefetch in this
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initial batch, and r11 holds any remainder. */
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L(prefetchSRC):
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dcbt r12,r4
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addi r12,r12,64
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bdnz L(prefetchSRC)
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/* Prefetching is done, or was not needed.
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cr6 - are we on a cacheline boundary already?
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r7 - number of quadwords to the next cacheline boundary
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*/
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L(nocacheprefetch):
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mtctr r7
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cmplwi cr1,r5,64 /* Less than a cache line to copy? */
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/* How many bytes are left after we copy whatever full
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cache lines we can get? */
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clrlwi r5,r5,32-6
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beq cr6,L(cachelinealigned)
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/* Copy quadwords up to the next cacheline boundary */
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L(aligntocacheline):
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lfd fp9,0x08(r4)
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lfdu fp10,0x10(r4)
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stfd fp9,0x08(r6)
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stfdu fp10,0x10(r6)
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bdnz L(aligntocacheline)
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.align 4
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L(cachelinealigned): /* copy while cache lines */
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blt- cr1,L(lessthancacheline) /* size <64 */
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L(outerloop):
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cmpwi r11,0
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mtctr r11
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beq- L(endloop)
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li r11,64*ZERO_AHEAD +8 /* DCBZ dist */
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.align 4
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/* Copy whole cachelines, optimized by prefetching SRC cacheline */
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L(loop): /* Copy aligned body */
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dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
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lfd fp9, 0x08(r4)
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dcbz r11,r6
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lfd fp10, 0x10(r4)
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lfd fp11, 0x18(r4)
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lfd fp12, 0x20(r4)
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stfd fp9, 0x08(r6)
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stfd fp10, 0x10(r6)
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stfd fp11, 0x18(r6)
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stfd fp12, 0x20(r6)
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lfd fp9, 0x28(r4)
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lfd fp10, 0x30(r4)
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lfd fp11, 0x38(r4)
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lfdu fp12, 0x40(r4)
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stfd fp9, 0x28(r6)
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stfd fp10, 0x30(r6)
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stfd fp11, 0x38(r6)
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stfdu fp12, 0x40(r6)
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bdnz L(loop)
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L(endloop):
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cmpwi r10,0
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beq- L(endloop2)
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mtctr r10
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L(loop2): /* Copy aligned body */
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lfd fp9, 0x08(r4)
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lfd fp10, 0x10(r4)
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lfd fp11, 0x18(r4)
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lfd fp12, 0x20(r4)
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stfd fp9, 0x08(r6)
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stfd fp10, 0x10(r6)
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stfd fp11, 0x18(r6)
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stfd fp12, 0x20(r6)
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lfd fp9, 0x28(r4)
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lfd fp10, 0x30(r4)
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lfd fp11, 0x38(r4)
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lfdu fp12, 0x40(r4)
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stfd fp9, 0x28(r6)
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stfd fp10, 0x30(r6)
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stfd fp11, 0x38(r6)
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stfdu fp12, 0x40(r6)
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bdnz L(loop2)
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L(endloop2):
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.align 4
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L(lessthancacheline): /* Was there less than cache to do ? */
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cmplwi cr0,r5,16
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srwi r7,r5,4 /* divide size by 16 */
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blt- L(do_lt16)
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mtctr r7
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L(copy_remaining):
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lfd fp9, 0x08(r4)
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lfdu fp10, 0x10(r4)
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stfd fp9, 0x08(r6)
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stfdu fp10, 0x10(r6)
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bdnz L(copy_remaining)
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L(do_lt16): /* less than 16 ? */
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cmplwi cr0,r5,0 /* copy remaining bytes (0-15) */
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beqlr+ /* no rest to copy */
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addi r4,r4,8
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addi r6,r6,8
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L(shortcopy): /* SIMPLE COPY to handle size =< 15 bytes */
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mtcrf 0x01,r5
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sub r7,r4,r6
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bf- cr7*4+0,8f
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lfdx fp9,r7,r6 /* copy 8 byte */
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stfd fp9,0(r6)
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addi r6,r6,8
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8:
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bf cr7*4+1,4f
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lwzx r0,r7,r6 /* copy 4 byte */
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stw r0,0(r6)
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addi r6,r6,4
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4:
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bf cr7*4+2,2f
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lhzx r0,r7,r6 /* copy 2 byte */
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sth r0,0(r6)
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addi r6,r6,2
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2:
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bf cr7*4+3,1f
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lbzx r0,r7,r6 /* copy 1 byte */
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stb r0,0(r6)
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1:
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blr
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/* Similar to above, but for use with 128 byte lines. */
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L(big_lines):
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clrlwi r7,r7,32-7 /* How far to next cacheline bdy? */
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cmplwi cr6,r7,0 /* Are we on a cacheline bdy already? */
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/* Reduce total len by what it takes to get to the next cache line */
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subf r5,r7,r5
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srwi r7,r7,4 /* How many qw to get to the line bdy? */
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/* How many full cache lines to copy after getting to a line bdy? */
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srwi r10,r5,7
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cmplwi r10,0 /* If no full cache lines to copy ... */
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li r11,0 /* number cachelines to copy with prefetch */
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beq L(nocacheprefetch_128)
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/* We are here because we have at least one full cache line to copy,
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and therefore some pre-touching to do. */
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cmplwi r10,PREFETCH_AHEAD
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li r12,128+8 /* prefetch distance */
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ble L(lessthanmaxprefetch_128)
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/* We can only do so much pre-fetching. R11 will have the count of
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lines left to prefetch after the initial batch of prefetches
|
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are executed. */
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|
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subi r11,r10,PREFETCH_AHEAD
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li r10,PREFETCH_AHEAD
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L(lessthanmaxprefetch_128):
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mtctr r10
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/* At this point r10/ctr hold the number of lines to prefetch in this
|
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initial batch, and r11 holds any remainder. */
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L(prefetchSRC_128):
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dcbt r12,r4
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addi r12,r12,128
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bdnz L(prefetchSRC_128)
|
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|
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|
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/* Prefetching is done, or was not needed.
|
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|
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cr6 - are we on a cacheline boundary already?
|
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r7 - number of quadwords to the next cacheline boundary
|
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*/
|
||||
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L(nocacheprefetch_128):
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mtctr r7
|
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|
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cmplwi cr1,r5,128 /* Less than a cache line to copy? */
|
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|
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/* How many bytes are left after we copy whatever full
|
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cache lines we can get? */
|
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clrlwi r5,r5,32-7
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|
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beq cr6,L(cachelinealigned_128)
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|
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|
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/* Copy quadwords up to the next cacheline boundary */
|
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|
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L(aligntocacheline_128):
|
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lfd fp9,0x08(r4)
|
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lfdu fp10,0x10(r4)
|
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stfd fp9,0x08(r6)
|
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stfdu fp10,0x10(r6)
|
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bdnz L(aligntocacheline_128)
|
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|
||||
|
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L(cachelinealigned_128): /* copy while cache lines */
|
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|
||||
blt- cr1,L(lessthancacheline) /* size <128 */
|
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|
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L(outerloop_128):
|
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cmpwi r11,0
|
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mtctr r11
|
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beq- L(endloop_128)
|
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|
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li r11,128*ZERO_AHEAD +8 /* DCBZ dist */
|
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|
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.align 4
|
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/* Copy whole cachelines, optimized by prefetching SRC cacheline */
|
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L(loop_128): /* Copy aligned body */
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dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
|
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lfd fp9, 0x08(r4)
|
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dcbz r11,r6
|
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lfd fp10, 0x10(r4)
|
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lfd fp11, 0x18(r4)
|
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lfd fp12, 0x20(r4)
|
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stfd fp9, 0x08(r6)
|
||||
stfd fp10, 0x10(r6)
|
||||
stfd fp11, 0x18(r6)
|
||||
stfd fp12, 0x20(r6)
|
||||
lfd fp9, 0x28(r4)
|
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lfd fp10, 0x30(r4)
|
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lfd fp11, 0x38(r4)
|
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lfd fp12, 0x40(r4)
|
||||
stfd fp9, 0x28(r6)
|
||||
stfd fp10, 0x30(r6)
|
||||
stfd fp11, 0x38(r6)
|
||||
stfd fp12, 0x40(r6)
|
||||
lfd fp9, 0x48(r4)
|
||||
lfd fp10, 0x50(r4)
|
||||
lfd fp11, 0x58(r4)
|
||||
lfd fp12, 0x60(r4)
|
||||
stfd fp9, 0x48(r6)
|
||||
stfd fp10, 0x50(r6)
|
||||
stfd fp11, 0x58(r6)
|
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stfd fp12, 0x60(r6)
|
||||
lfd fp9, 0x68(r4)
|
||||
lfd fp10, 0x70(r4)
|
||||
lfd fp11, 0x78(r4)
|
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lfdu fp12, 0x80(r4)
|
||||
stfd fp9, 0x68(r6)
|
||||
stfd fp10, 0x70(r6)
|
||||
stfd fp11, 0x78(r6)
|
||||
stfdu fp12, 0x80(r6)
|
||||
|
||||
bdnz L(loop_128)
|
||||
|
||||
|
||||
L(endloop_128):
|
||||
cmpwi r10,0
|
||||
beq- L(endloop2_128)
|
||||
mtctr r10
|
||||
|
||||
L(loop2_128): /* Copy aligned body */
|
||||
lfd fp9, 0x08(r4)
|
||||
lfd fp10, 0x10(r4)
|
||||
lfd fp11, 0x18(r4)
|
||||
lfd fp12, 0x20(r4)
|
||||
stfd fp9, 0x08(r6)
|
||||
stfd fp10, 0x10(r6)
|
||||
stfd fp11, 0x18(r6)
|
||||
stfd fp12, 0x20(r6)
|
||||
lfd fp9, 0x28(r4)
|
||||
lfd fp10, 0x30(r4)
|
||||
lfd fp11, 0x38(r4)
|
||||
lfd fp12, 0x40(r4)
|
||||
stfd fp9, 0x28(r6)
|
||||
stfd fp10, 0x30(r6)
|
||||
stfd fp11, 0x38(r6)
|
||||
stfd fp12, 0x40(r6)
|
||||
lfd fp9, 0x48(r4)
|
||||
lfd fp10, 0x50(r4)
|
||||
lfd fp11, 0x58(r4)
|
||||
lfd fp12, 0x60(r4)
|
||||
stfd fp9, 0x48(r6)
|
||||
stfd fp10, 0x50(r6)
|
||||
stfd fp11, 0x58(r6)
|
||||
stfd fp12, 0x60(r6)
|
||||
lfd fp9, 0x68(r4)
|
||||
lfd fp10, 0x70(r4)
|
||||
lfd fp11, 0x78(r4)
|
||||
lfdu fp12, 0x80(r4)
|
||||
stfd fp9, 0x68(r6)
|
||||
stfd fp10, 0x70(r6)
|
||||
stfd fp11, 0x78(r6)
|
||||
stfdu fp12, 0x80(r6)
|
||||
bdnz L(loop2_128)
|
||||
L(endloop2_128):
|
||||
|
||||
b L(lessthancacheline)
|
||||
|
||||
|
||||
END (BP_SYM (memcpy))
|
||||
libc_hidden_builtin_def (memcpy)
|
||||
@ -1,501 +0,0 @@
|
||||
/* Optimized memcpy implementation for PowerPC A2.
|
||||
Copyright (C) 2010 Free Software Foundation, Inc.
|
||||
Contributed by Michael Brutman <brutman@us.ibm.com>.
|
||||
This file is part of the GNU C Library.
|
||||
|
||||
The GNU C Library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
The GNU C Library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, write to the Free
|
||||
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
|
||||
02111-1307 USA. */
|
||||
|
||||
#include <sysdep.h>
|
||||
#include <bp-sym.h>
|
||||
#include <bp-asm.h>
|
||||
|
||||
#define PREFETCH_AHEAD 4 /* no cache lines SRC prefetching ahead */
|
||||
#define ZERO_AHEAD 2 /* no cache lines DST zeroing ahead */
|
||||
|
||||
.section ".toc","aw"
|
||||
.LC0:
|
||||
.tc __cache_line_size[TC],__cache_line_size
|
||||
.section ".text"
|
||||
.align 2
|
||||
|
||||
|
||||
.machine ppca2
|
||||
EALIGN (BP_SYM (memcpy), 5, 0)
|
||||
CALL_MCOUNT 3
|
||||
|
||||
dcbt 0,r4 /* Prefetch ONE SRC cacheline */
|
||||
cmpldi cr1,r5,16 /* is size < 16 ? */
|
||||
mr r6,r3 /* Copy dest reg to r6; */
|
||||
blt+ cr1,L(shortcopy)
|
||||
|
||||
|
||||
/* Big copy (16 bytes or more)
|
||||
|
||||
Figure out how far to the nearest quadword boundary, or if we are
|
||||
on one already. Also get the cache line size.
|
||||
|
||||
r3 - return value (always)
|
||||
r4 - current source addr
|
||||
r5 - copy length
|
||||
r6 - current dest addr
|
||||
*/
|
||||
|
||||
neg r8,r3 /* LS 4 bits = # bytes to 8-byte dest bdry */
|
||||
ld r9,.LC0@toc(r2) /* Get cache line size (part 1) */
|
||||
clrldi r8,r8,64-4 /* align to 16byte boundary */
|
||||
sub r7,r4,r3 /* compute offset to src from dest */
|
||||
lwz r9,0(r9) /* Get cache line size (part 2) */
|
||||
cmpldi cr0,r8,0 /* Were we aligned on a 16 byte bdy? */
|
||||
addi r10,r9,-1 /* Cache line mask */
|
||||
beq+ L(dst_aligned)
|
||||
|
||||
|
||||
|
||||
/* Destination is not aligned on quadword boundary. Get us to one.
|
||||
|
||||
r3 - return value (always)
|
||||
r4 - current source addr
|
||||
r5 - copy length
|
||||
r6 - current dest addr
|
||||
r7 - offset to src from dest
|
||||
r8 - number of bytes to quadword boundary
|
||||
*/
|
||||
|
||||
mtcrf 0x01,r8 /* put #bytes to boundary into cr7 */
|
||||
subf r5,r8,r5 /* adjust remaining len */
|
||||
|
||||
bf cr7*4+3,1f
|
||||
lbzx r0,r7,r6 /* copy 1 byte addr */
|
||||
stb r0,0(r6)
|
||||
addi r6,r6,1
|
||||
1:
|
||||
bf cr7*4+2,2f
|
||||
lhzx r0,r7,r6 /* copy 2 byte addr */
|
||||
sth r0,0(r6)
|
||||
addi r6,r6,2
|
||||
2:
|
||||
bf cr7*4+1,4f
|
||||
lwzx r0,r7,r6 /* copy 4 byte addr */
|
||||
stw r0,0(r6)
|
||||
addi r6,r6,4
|
||||
4:
|
||||
bf cr7*4+0,8f
|
||||
ldx r0,r7,r6 /* copy 8 byte addr */
|
||||
std r0,0(r6)
|
||||
addi r6,r6,8
|
||||
8:
|
||||
add r4,r7,r6 /* update src addr */
|
||||
|
||||
|
||||
|
||||
/* Dest is quadword aligned now.
|
||||
|
||||
Lots of decisions to make. If we are copying less than a cache
|
||||
line we won't be here long. If we are not on a cache line
|
||||
boundary we need to get there. And then we need to figure out
|
||||
how many cache lines ahead to pre-touch.
|
||||
|
||||
r3 - return value (always)
|
||||
r4 - current source addr
|
||||
r5 - copy length
|
||||
r6 - current dest addr
|
||||
*/
|
||||
|
||||
|
||||
.align 4
|
||||
L(dst_aligned):
|
||||
|
||||
|
||||
cmpd cr5,r5,r10 /* Less than a cacheline to go? */
|
||||
|
||||
neg r7,r6 /* How far to next cacheline bdy? */
|
||||
|
||||
addi r6,r6,-8 /* prepare for stdu */
|
||||
cmpdi cr0,r9,128
|
||||
addi r4,r4,-8 /* prepare for ldu */
|
||||
|
||||
|
||||
ble+ cr5,L(lessthancacheline)
|
||||
|
||||
beq- cr0,L(big_lines) /* 128 byte line code */
|
||||
|
||||
|
||||
|
||||
/* More than a cacheline left to go, and using 64 byte cachelines */
|
||||
|
||||
clrldi r7,r7,64-6 /* How far to next cacheline bdy? */
|
||||
|
||||
cmpldi cr6,r7,0 /* Are we on a cacheline bdy already? */
|
||||
|
||||
/* Reduce total len by what it takes to get to the next cache line */
|
||||
subf r5,r7,r5
|
||||
srdi r7,r7,4 /* How many qws to get to the line bdy? */
|
||||
|
||||
/* How many full cache lines to copy after getting to a line bdy? */
|
||||
srdi r10,r5,6
|
||||
|
||||
cmpldi r10,0 /* If no full cache lines to copy ... */
|
||||
li r11,0 /* number cachelines to copy with prefetch */
|
||||
beq L(nocacheprefetch)
|
||||
|
||||
|
||||
/* We are here because we have at least one full cache line to copy,
|
||||
and therefore some pre-touching to do. */
|
||||
|
||||
cmpldi r10,PREFETCH_AHEAD
|
||||
li r12,64+8 /* prefetch distance */
|
||||
ble L(lessthanmaxprefetch)
|
||||
|
||||
/* We can only do so much pre-fetching. R11 will have the count of
|
||||
lines left to prefetch after the initial batch of prefetches
|
||||
are executed. */
|
||||
|
||||
subi r11,r10,PREFETCH_AHEAD
|
||||
li r10,PREFETCH_AHEAD
|
||||
|
||||
L(lessthanmaxprefetch):
|
||||
mtctr r10
|
||||
|
||||
/* At this point r10/ctr hold the number of lines to prefetch in this
|
||||
initial batch, and r11 holds any remainder. */
|
||||
|
||||
L(prefetchSRC):
|
||||
dcbt r12,r4
|
||||
addi r12,r12,64
|
||||
bdnz L(prefetchSRC)
|
||||
|
||||
|
||||
/* Prefetching is done, or was not needed.
|
||||
|
||||
cr6 - are we on a cacheline boundary already?
|
||||
r7 - number of quadwords to the next cacheline boundary
|
||||
*/
|
||||
|
||||
L(nocacheprefetch):
|
||||
mtctr r7
|
||||
|
||||
cmpldi cr1,r5,64 /* Less than a cache line to copy? */
|
||||
|
||||
/* How many bytes are left after we copy whatever full
|
||||
cache lines we can get? */
|
||||
clrldi r5,r5,64-6
|
||||
|
||||
beq cr6,L(cachelinealigned)
|
||||
|
||||
|
||||
/* Copy quadwords up to the next cacheline boundary */
|
||||
|
||||
L(aligntocacheline):
|
||||
ld r9,0x08(r4)
|
||||
ld r7,0x10(r4)
|
||||
addi r4,r4,0x10
|
||||
std r9,0x08(r6)
|
||||
stdu r7,0x10(r6)
|
||||
bdnz L(aligntocacheline)
|
||||
|
||||
|
||||
.align 4
|
||||
L(cachelinealigned): /* copy while cache lines */
|
||||
|
||||
blt- cr1,L(lessthancacheline) /* size <64 */
|
||||
|
||||
L(outerloop):
|
||||
cmpdi r11,0
|
||||
mtctr r11
|
||||
beq- L(endloop)
|
||||
|
||||
li r11,64*ZERO_AHEAD +8 /* DCBZ dist */
|
||||
|
||||
.align 4
|
||||
/* Copy whole cachelines, optimized by prefetching SRC cacheline */
|
||||
L(loop): /* Copy aligned body */
|
||||
dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
|
||||
ld r9, 0x08(r4)
|
||||
dcbz r11,r6
|
||||
ld r7, 0x10(r4)
|
||||
ld r8, 0x18(r4)
|
||||
ld r0, 0x20(r4)
|
||||
std r9, 0x08(r6)
|
||||
std r7, 0x10(r6)
|
||||
std r8, 0x18(r6)
|
||||
std r0, 0x20(r6)
|
||||
ld r9, 0x28(r4)
|
||||
ld r7, 0x30(r4)
|
||||
ld r8, 0x38(r4)
|
||||
ld r0, 0x40(r4)
|
||||
addi r4, r4,0x40
|
||||
std r9, 0x28(r6)
|
||||
std r7, 0x30(r6)
|
||||
std r8, 0x38(r6)
|
||||
stdu r0, 0x40(r6)
|
||||
|
||||
bdnz L(loop)
|
||||
|
||||
|
||||
L(endloop):
|
||||
cmpdi r10,0
|
||||
beq- L(endloop2)
|
||||
mtctr r10
|
||||
|
||||
L(loop2): /* Copy aligned body */
|
||||
ld r9, 0x08(r4)
|
||||
ld r7, 0x10(r4)
|
||||
ld r8, 0x18(r4)
|
||||
ld r0, 0x20(r4)
|
||||
std r9, 0x08(r6)
|
||||
std r7, 0x10(r6)
|
||||
std r8, 0x18(r6)
|
||||
std r0, 0x20(r6)
|
||||
ld r9, 0x28(r4)
|
||||
ld r7, 0x30(r4)
|
||||
ld r8, 0x38(r4)
|
||||
ld r0, 0x40(r4)
|
||||
addi r4, r4,0x40
|
||||
std r9, 0x28(r6)
|
||||
std r7, 0x30(r6)
|
||||
std r8, 0x38(r6)
|
||||
stdu r0, 0x40(r6)
|
||||
|
||||
bdnz L(loop2)
|
||||
L(endloop2):
|
||||
|
||||
|
||||
.align 4
|
||||
L(lessthancacheline): /* Was there less than cache to do ? */
|
||||
cmpldi cr0,r5,16
|
||||
srdi r7,r5,4 /* divide size by 16 */
|
||||
blt- L(do_lt16)
|
||||
mtctr r7
|
||||
|
||||
L(copy_remaining):
|
||||
ld r8,0x08(r4)
|
||||
ld r7,0x10(r4)
|
||||
addi r4,r4,0x10
|
||||
std r8,0x08(r6)
|
||||
stdu r7,0x10(r6)
|
||||
bdnz L(copy_remaining)
|
||||
|
||||
L(do_lt16): /* less than 16 ? */
|
||||
cmpldi cr0,r5,0 /* copy remaining bytes (0-15) */
|
||||
beqlr+ /* no rest to copy */
|
||||
addi r4,r4,8
|
||||
addi r6,r6,8
|
||||
|
||||
L(shortcopy): /* SIMPLE COPY to handle size =< 15 bytes */
|
||||
mtcrf 0x01,r5
|
||||
sub r7,r4,r6
|
||||
bf- cr7*4+0,8f
|
||||
ldx r0,r7,r6 /* copy 8 byte */
|
||||
std r0,0(r6)
|
||||
addi r6,r6,8
|
||||
8:
|
||||
bf cr7*4+1,4f
|
||||
lwzx r0,r7,r6 /* copy 4 byte */
|
||||
stw r0,0(r6)
|
||||
addi r6,r6,4
|
||||
4:
|
||||
bf cr7*4+2,2f
|
||||
lhzx r0,r7,r6 /* copy 2 byte */
|
||||
sth r0,0(r6)
|
||||
addi r6,r6,2
|
||||
2:
|
||||
bf cr7*4+3,1f
|
||||
lbzx r0,r7,r6 /* copy 1 byte */
|
||||
stb r0,0(r6)
|
||||
1:
|
||||
blr
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Similar to above, but for use with 128 byte lines. */
|
||||
|
||||
|
||||
L(big_lines):
|
||||
|
||||
clrldi r7,r7,64-7 /* How far to next cacheline bdy? */
|
||||
|
||||
cmpldi cr6,r7,0 /* Are we on a cacheline bdy already? */
|
||||
|
||||
/* Reduce total len by what it takes to get to the next cache line */
|
||||
subf r5,r7,r5
|
||||
srdi r7,r7,4 /* How many qws to get to the line bdy? */
|
||||
|
||||
/* How many full cache lines to copy after getting to a line bdy? */
|
||||
srdi r10,r5,7
|
||||
|
||||
cmpldi r10,0 /* If no full cache lines to copy ... */
|
||||
li r11,0 /* number cachelines to copy with prefetch */
|
||||
beq L(nocacheprefetch_128)
|
||||
|
||||
|
||||
/* We are here because we have at least one full cache line to copy,
|
||||
and therefore some pre-touching to do. */
|
||||
|
||||
cmpldi r10,PREFETCH_AHEAD
|
||||
li r12,128+8 /* prefetch distance */
|
||||
ble L(lessthanmaxprefetch_128)
|
||||
|
||||
/* We can only do so much pre-fetching. R11 will have the count of
|
||||
lines left to prefetch after the initial batch of prefetches
|
||||
are executed. */
|
||||
|
||||
subi r11,r10,PREFETCH_AHEAD
|
||||
li r10,PREFETCH_AHEAD
|
||||
|
||||
L(lessthanmaxprefetch_128):
|
||||
mtctr r10
|
||||
|
||||
/* At this point r10/ctr hold the number of lines to prefetch in this
|
||||
initial batch, and r11 holds any remainder. */
|
||||
|
||||
L(prefetchSRC_128):
|
||||
dcbt r12,r4
|
||||
addi r12,r12,128
|
||||
bdnz L(prefetchSRC_128)
|
||||
|
||||
|
||||
/* Prefetching is done, or was not needed.
|
||||
|
||||
cr6 - are we on a cacheline boundary already?
|
||||
r7 - number of quadwords to the next cacheline boundary
|
||||
*/
|
||||
|
||||
L(nocacheprefetch_128):
|
||||
mtctr r7
|
||||
|
||||
cmpldi cr1,r5,128 /* Less than a cache line to copy? */
|
||||
|
||||
/* How many bytes are left after we copy whatever full
|
||||
cache lines we can get? */
|
||||
clrldi r5,r5,64-7
|
||||
|
||||
beq cr6,L(cachelinealigned_128)
|
||||
|
||||
|
||||
/* Copy quadwords up to the next cacheline boundary */
|
||||
|
||||
L(aligntocacheline_128):
|
||||
ld r9,0x08(r4)
|
||||
ld r7,0x10(r4)
|
||||
addi r4,r4,0x10
|
||||
std r9,0x08(r6)
|
||||
stdu r7,0x10(r6)
|
||||
bdnz L(aligntocacheline_128)
|
||||
|
||||
|
||||
L(cachelinealigned_128): /* copy while cache lines */
|
||||
|
||||
blt- cr1,L(lessthancacheline) /* size <128 */
|
||||
|
||||
L(outerloop_128):
|
||||
cmpdi r11,0
|
||||
mtctr r11
|
||||
beq- L(endloop_128)
|
||||
|
||||
li r11,128*ZERO_AHEAD +8 /* DCBZ dist */
|
||||
|
||||
.align 4
|
||||
/* Copy whole cachelines, optimized by prefetching SRC cacheline */
|
||||
L(loop_128): /* Copy aligned body */
|
||||
dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
|
||||
ld r9, 0x08(r4)
|
||||
dcbz r11,r6
|
||||
ld r7, 0x10(r4)
|
||||
ld r8, 0x18(r4)
|
||||
ld r0, 0x20(r4)
|
||||
std r9, 0x08(r6)
|
||||
std r7, 0x10(r6)
|
||||
std r8, 0x18(r6)
|
||||
std r0, 0x20(r6)
|
||||
ld r9, 0x28(r4)
|
||||
ld r7, 0x30(r4)
|
||||
ld r8, 0x38(r4)
|
||||
ld r0, 0x40(r4)
|
||||
std r9, 0x28(r6)
|
||||
std r7, 0x30(r6)
|
||||
std r8, 0x38(r6)
|
||||
std r0, 0x40(r6)
|
||||
ld r9, 0x48(r4)
|
||||
ld r7, 0x50(r4)
|
||||
ld r8, 0x58(r4)
|
||||
ld r0, 0x60(r4)
|
||||
std r9, 0x48(r6)
|
||||
std r7, 0x50(r6)
|
||||
std r8, 0x58(r6)
|
||||
std r0, 0x60(r6)
|
||||
ld r9, 0x68(r4)
|
||||
ld r7, 0x70(r4)
|
||||
ld r8, 0x78(r4)
|
||||
ld r0, 0x80(r4)
|
||||
addi r4, r4,0x80
|
||||
std r9, 0x68(r6)
|
||||
std r7, 0x70(r6)
|
||||
std r8, 0x78(r6)
|
||||
stdu r0, 0x80(r6)
|
||||
|
||||
bdnz L(loop_128)
|
||||
|
||||
|
||||
L(endloop_128):
|
||||
cmpdi r10,0
|
||||
beq- L(endloop2_128)
|
||||
mtctr r10
|
||||
|
||||
L(loop2_128): /* Copy aligned body */
|
||||
ld r9, 0x08(r4)
|
||||
ld r7, 0x10(r4)
|
||||
ld r8, 0x18(r4)
|
||||
ld r0, 0x20(r4)
|
||||
std r9, 0x08(r6)
|
||||
std r7, 0x10(r6)
|
||||
std r8, 0x18(r6)
|
||||
std r0, 0x20(r6)
|
||||
ld r9, 0x28(r4)
|
||||
ld r7, 0x30(r4)
|
||||
ld r8, 0x38(r4)
|
||||
ld r0, 0x40(r4)
|
||||
std r9, 0x28(r6)
|
||||
std r7, 0x30(r6)
|
||||
std r8, 0x38(r6)
|
||||
std r0, 0x40(r6)
|
||||
ld r9, 0x48(r4)
|
||||
ld r7, 0x50(r4)
|
||||
ld r8, 0x58(r4)
|
||||
ld r0, 0x60(r4)
|
||||
std r9, 0x48(r6)
|
||||
std r7, 0x50(r6)
|
||||
std r8, 0x58(r6)
|
||||
std r0, 0x60(r6)
|
||||
ld r9, 0x68(r4)
|
||||
ld r7, 0x70(r4)
|
||||
ld r8, 0x78(r4)
|
||||
ld r0, 0x80(r4)
|
||||
addi r4, r4,0x80
|
||||
std r9, 0x68(r6)
|
||||
std r7, 0x70(r6)
|
||||
std r8, 0x78(r6)
|
||||
stdu r0, 0x80(r6)
|
||||
|
||||
bdnz L(loop2_128)
|
||||
L(endloop2_128):
|
||||
|
||||
b L(lessthancacheline)
|
||||
|
||||
|
||||
END_GEN_TB (BP_SYM (memcpy),TB_TOCLESS)
|
||||
libc_hidden_builtin_def (memcpy)
|
||||
@ -1,3 +0,0 @@
|
||||
# Make sure this comes before the powerpc/powerpc32/fpu that's
|
||||
# listed in unix/sysv/linux/powerpc/powerpc32/fpu/Implies.
|
||||
powerpc/powerpc32/ppca2/fpu/
|
||||
@ -1,3 +0,0 @@
|
||||
# Make sure this comes before the powerpc/powerpc64/fpu that's
|
||||
# listed in unix/sysv/linux/powerpc/powerpc64/fpu/Implies.
|
||||
powerpc/powerpc64/ppca2/fpu
|
||||
Loading…
Reference in New Issue
Block a user