MIPS: Only use .set mips* assembler directives when necessary

There are a few .set mips* assembler directives used in the MIPS specific
sysdep code that force an instruction to be assembled for a specific ISA.
The reason for these is to allow an instruction to be encoded when it might
not be supported in the current ISA (when the code is run the Linux kernel
will trap and emulate any unsupported instructions).  Unfortunately forcing
a specific ISA means that when assembling for a newer ISA, where the
instruction has a different encoding, the wrong encoding will be used.

        * sysdeps/mips/bits/atomic.h [_MIPS_SIM == _ABIO32] (MIPS_PUSH_MIPS2):
        Only use .set mips2 if the current ISA is below mips2.
        * sysdeps/mips/sys/tas.h [_MIPS_SIM == _ABIO32] (_test_and_set):
        Likewise.
        * sysdeps/mips/nptl/tls.h (READ_THREAD_POINTER): Only use .set
        mips32r2 if the current ISA is below mips32r2.
        * sysdeps/mips/tls-macros.h (TLS_RDHWR): New define.
        (TLS_IE): Updated to use the TLD_RDHWR macro.
        (TLS_LE): Likewise.
        * sysdeps/unix/mips/sysdep.h (__mips_isa_rev): Moved out of #ifdef
        __ASSEMBLER__ condition.

ChangeLog

@@ -1,3 +1,17 @@
+2015-09-08  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* sysdeps/mips/bits/atomic.h [_MIPS_SIM == _ABIO32] (MIPS_PUSH_MIPS2):
+	Only use .set mips2 if the current ISA is below mips2.
+	* sysdeps/mips/sys/tas.h [_MIPS_SIM == _ABIO32] (_test_and_set):
+	Likewise.
+	* sysdeps/mips/nptl/tls.h (READ_THREAD_POINTER): Only use .set
+	mips32r2 if the current ISA is below mips32r2.
+	* sysdeps/mips/tls-macros.h (TLS_RDHWR): New define.
+	(TLS_IE): Updated to use the TLD_RDHWR macro.
+	(TLS_LE): Likewise.
+	* sysdeps/unix/mips/sysdep.h (__mips_isa_rev): Moved out of #ifdef
+	__ASSEMBLER__ condition.
+
 2015-09-08  Samuel Thibault  <samuel.thibault@ens-lyon.org>
 
 	Fix parallel build of before-compile targets.

sysdeps/mips/bits/atomic.h

@@ -38,7 +38,7 @@ typedef uintptr_t uatomicptr_t;
 typedef intmax_t atomic_max_t;
 typedef uintmax_t uatomic_max_t;
 
-#if _MIPS_SIM == _ABIO32
+#if _MIPS_SIM == _ABIO32 && __mips < 2
 #define MIPS_PUSH_MIPS2 ".set	mips2\n\t"
 #else
 #define MIPS_PUSH_MIPS2

sysdeps/mips/nptl/tls.h

@@ -25,6 +25,8 @@
 # include <stdbool.h>
 # include <stddef.h>
 # include <stdint.h>
+/* Get system call information.  */
+# include <sysdep.h>
 
 /* Type for the dtv.  */
 typedef union dtv
@@ -42,29 +44,37 @@ typedef union dtv
 # define READ_THREAD_POINTER() (__builtin_thread_pointer ())
 #else
 /* Note: rd must be $v1 to be ABI-conformant.  */
-# define READ_THREAD_POINTER() \
+# if __mips_isa_rev >= 2
-    ({ void *__result;							      \
+#  define READ_THREAD_POINTER() \
-       asm volatile (".set\tpush\n\t.set\tmips32r2\n\t"			      \
+     ({ void *__result;							      \
-		     "rdhwr\t%0, $29\n\t.set\tpop" : "=v" (__result));	      \
+        asm volatile ("rdhwr\t%0, $29" : "=v" (__result));	      	      \
-       __result; })
+        __result; })
+# else
+#  define READ_THREAD_POINTER() \
+     ({ void *__result;							      \
+        asm volatile (".set\tpush\n\t.set\tmips32r2\n\t"			      \
+		      "rdhwr\t%0, $29\n\t.set\tpop" : "=v" (__result));	      \
+        __result; })
+# endif
 #endif
 
 #else /* __ASSEMBLER__ */
 # include <tcb-offsets.h>
 
-# define READ_THREAD_POINTER(rd) \
+# if __mips_isa_rev >= 2
-	.set	push;							      \
+#  define READ_THREAD_POINTER(rd) rdhwr	rd, $29
-	.set	mips32r2;						      \
+# else
-	rdhwr	rd, $29;						      \
+#  define READ_THREAD_POINTER(rd) \
-	.set	pop
+	 .set	push;							      \
+	 .set	mips32r2;						      \
+	 rdhwr	rd, $29;						      \
+	 .set	pop
+# endif
 #endif /* __ASSEMBLER__ */
 
 
 #ifndef __ASSEMBLER__
 
-/* Get system call information.  */
-# include <sysdep.h>
-
 /* The TP points to the start of the thread blocks.  */
 # define TLS_DTV_AT_TP	1
 # define TLS_TCB_AT_TP	0

sysdeps/mips/sys/tas.h

@@ -41,7 +41,7 @@ __NTH (_test_and_set (int *__p, int __v))
   __asm__ __volatile__
     ("/* Inline test and set */\n"
      ".set	push\n\t"
-#if _MIPS_SIM == _ABIO32
+#if _MIPS_SIM == _ABIO32 && __mips < 2
      ".set	mips2\n\t"
 #endif
      "sync\n\t"

sysdeps/mips/tls-macros.h

@@ -2,6 +2,7 @@
 
 #include <sys/cdefs.h>
 #include <sys/asm.h>
+#include <sysdep.h>
 
 #define __STRING2(X) __STRING(X)
 #define ADDU __STRING2(PTR_ADDU)
@@ -38,6 +39,14 @@
 # define UNLOAD_GP
 #endif
 
+# if __mips_isa_rev >= 2
+#  define TLS_RDHWR "rdhwr\t%0,$29"
+# else
+#  define TLS_RDHWR 					\
+	  ".set push\n\t.set mips32r2\n\t"		\
+	  "rdhwr\t%0,$29\n\t.set pop"
+#endif
+
 #ifndef __mips16
 # define TLS_GD(x)					\
   ({ void *__result, *__tmp;				\
@@ -60,8 +69,7 @@
      __result; })
 # define TLS_IE(x)					\
   ({ void *__result, *__tmp;				\
-     asm (".set push\n\t.set mips32r2\n\t"		\
+     asm (TLS_RDHWR					\
-	  "rdhwr\t%0,$29\n\t.set pop"			\
 	  : "=v" (__result));				\
      asm (LOAD_GP LW " $3,%%gottprel(" #x ")($28)\n\t"	\
 	  ADDU " %0,%0,$3"				\
@@ -71,8 +79,7 @@
      __result; })
 # define TLS_LE(x)					\
   ({ void *__result;					\
-     asm (".set push\n\t.set mips32r2\n\t"		\
+     asm (TLS_RDHWR					\
-	  "rdhwr\t%0,$29\n\t.set pop"			\
 	  : "=v" (__result));				\
      asm ("lui $3,%%tprel_hi(" #x ")\n\t"		\
 	  "addiu $3,$3,%%tprel_lo(" #x ")\n\t"		\

sysdeps/unix/mips/sysdep.h

@@ -19,6 +19,10 @@
 #include <sgidefs.h>
 #include <sysdeps/unix/sysdep.h>
 
+#ifndef __mips_isa_rev
+# define __mips_isa_rev 0
+#endif
+
 #ifdef __ASSEMBLER__
 
 #include <regdef.h>
@@ -78,8 +82,4 @@
 # define L(label) .L ## label
 #endif
 
-#ifndef __mips_isa_rev
-# define __mips_isa_rev 0
-#endif
-
 #endif