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Remove atomic_compare_and_exchange_bool_rel.
atomic_compare_and_exchange_bool_rel and catomic_compare_and_exchange_bool_rel are removed and replaced with the new C11-like atomic_compare_exchange_weak_release. The concurrent code in nscd/cache.c has not been reviewed yet, so this patch does not add detailed comments. * nscd/cache.c (cache_add): Use new C11-like atomic operation instead of atomic_compare_and_exchange_bool_rel. * nptl/pthread_mutex_unlock.c (__pthread_mutex_unlock_full): Likewise. * include/atomic.h (atomic_compare_and_exchange_bool_rel, catomic_compare_and_exchange_bool_rel): Remove. * sysdeps/aarch64/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/alpha/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/arm/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/mips/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/tile/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise.
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ChangeLog
30
ChangeLog
@ -1,3 +1,33 @@
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2016-06-24 Torvald Riegel <triegel@redhat.com>
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* nscd/cache.c (cache_add): Use new C11-like atomic operation instead
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of atomic_compare_and_exchange_bool_rel.
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* nptl/pthread_mutex_unlock.c (__pthread_mutex_unlock_full): Likewise.
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* include/atomic.h (atomic_compare_and_exchange_bool_rel,
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catomic_compare_and_exchange_bool_rel): Remove.
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* sysdeps/aarch64/atomic-machine.h
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(atomic_compare_and_exchange_bool_rel): Likewise.
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* sysdeps/alpha/atomic-machine.h
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(atomic_compare_and_exchange_bool_rel): Likewise.
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* sysdeps/arm/atomic-machine.h
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(atomic_compare_and_exchange_bool_rel): Likewise.
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* sysdeps/mips/atomic-machine.h
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(atomic_compare_and_exchange_bool_rel): Likewise.
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* sysdeps/microblaze/atomic-machine.h
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( __arch_compare_and_exchange_bool_8_rel,
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__arch_compare_and_exchange_bool_16_rel): Likewise.
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* sysdeps/powerpc/atomic-machine.h
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( __arch_compare_and_exchange_bool_8_rel,
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__arch_compare_and_exchange_bool_16_rel): Likewise.
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* sysdeps/powerpc/powerpc32/atomic-machine.h
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( __arch_compare_and_exchange_bool_32_rel,
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__arch_compare_and_exchange_bool_64_rel): Likewise.
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* sysdeps/powerpc/powerpc64/atomic-machine.h
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( __arch_compare_and_exchange_bool_32_rel,
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__arch_compare_and_exchange_bool_64_rel): Likewise.
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* sysdeps/tile/atomic-machine.h
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(atomic_compare_and_exchange_bool_rel): Likewise.
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2016-06-23 Joseph Myers <joseph@codesourcery.com>
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[BZ #20296]
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@ -159,23 +159,6 @@
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#endif
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#ifndef catomic_compare_and_exchange_bool_rel
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# ifndef atomic_compare_and_exchange_bool_rel
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# define catomic_compare_and_exchange_bool_rel(mem, newval, oldval) \
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catomic_compare_and_exchange_bool_acq (mem, newval, oldval)
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# else
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# define catomic_compare_and_exchange_bool_rel(mem, newval, oldval) \
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atomic_compare_and_exchange_bool_rel (mem, newval, oldval)
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# endif
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#endif
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#ifndef atomic_compare_and_exchange_bool_rel
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# define atomic_compare_and_exchange_bool_rel(mem, newval, oldval) \
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atomic_compare_and_exchange_bool_acq (mem, newval, oldval)
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#endif
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/* Store NEWVALUE in *MEM and return the old value. */
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#ifndef atomic_exchange_acq
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# define atomic_exchange_acq(mem, newvalue) \
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@ -237,15 +237,24 @@ __pthread_mutex_unlock_full (pthread_mutex_t *mutex, int decr)
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int private = (robust
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? PTHREAD_ROBUST_MUTEX_PSHARED (mutex)
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: PTHREAD_MUTEX_PSHARED (mutex));
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if ((mutex->__data.__lock & FUTEX_WAITERS) != 0
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|| atomic_compare_and_exchange_bool_rel (&mutex->__data.__lock, 0,
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THREAD_GETMEM (THREAD_SELF,
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tid)))
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/* Unlock the mutex using a CAS unless there are futex waiters or our
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TID is not the value of __lock anymore, in which case we let the
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kernel take care of the situation. Use release MO in the CAS to
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synchronize with acquire MO in lock acquisitions. */
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int l = atomic_load_relaxed (&mutex->__data.__lock);
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do
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{
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INTERNAL_SYSCALL_DECL (__err);
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INTERNAL_SYSCALL (futex, __err, 2, &mutex->__data.__lock,
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__lll_private_flag (FUTEX_UNLOCK_PI, private));
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if (((l & FUTEX_WAITERS) != 0)
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|| (l != THREAD_GETMEM (THREAD_SELF, tid)))
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{
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INTERNAL_SYSCALL_DECL (__err);
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INTERNAL_SYSCALL (futex, __err, 2, &mutex->__data.__lock,
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__lll_private_flag (FUTEX_UNLOCK_PI, private));
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break;
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}
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}
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while (!atomic_compare_exchange_weak_release (&mutex->__data.__lock,
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&l, 0));
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THREAD_SETMEM (THREAD_SELF, robust_head.list_op_pending, NULL);
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break;
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@ -278,15 +287,16 @@ __pthread_mutex_unlock_full (pthread_mutex_t *mutex, int decr)
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/* One less user. */
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--mutex->__data.__nusers;
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/* Unlock. */
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int newval, oldval;
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/* Unlock. Use release MO in the CAS to synchronize with acquire MO in
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lock acquisitions. */
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int newval;
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int oldval = atomic_load_relaxed (&mutex->__data.__lock);
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do
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{
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oldval = mutex->__data.__lock;
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newval = oldval & PTHREAD_MUTEX_PRIO_CEILING_MASK;
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}
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while (atomic_compare_and_exchange_bool_rel (&mutex->__data.__lock,
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newval, oldval));
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while (!atomic_compare_exchange_weak_release (&mutex->__data.__lock,
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&oldval, newval));
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if ((oldval & ~PTHREAD_MUTEX_PRIO_CEILING_MASK) > 1)
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lll_futex_wake (&mutex->__data.__lock, 1,
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12
nscd/cache.c
12
nscd/cache.c
@ -178,12 +178,12 @@ cache_add (int type, const void *key, size_t len, struct datahead *packet,
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assert ((newp->packet & BLOCK_ALIGN_M1) == 0);
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/* Put the new entry in the first position. */
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do
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newp->next = table->head->array[hash];
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while (atomic_compare_and_exchange_bool_rel (&table->head->array[hash],
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(ref_t) ((char *) newp
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- table->data),
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(ref_t) newp->next));
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/* TODO Review concurrency. Use atomic_exchange_release. */
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newp->next = atomic_load_relaxed (&table->head->array[hash]);
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while (!atomic_compare_exchange_weak_release (&table->head->array[hash],
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(ref_t *) &newp->next,
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(ref_t) ((char *) newp
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- table->data)));
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/* Update the statistics. */
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if (packet->notfound)
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@ -115,10 +115,6 @@ typedef uintmax_t uatomic_max_t;
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/* Compare and exchange with "release" semantics, ie barrier before. */
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# define atomic_compare_and_exchange_bool_rel(mem, new, old) \
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__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
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mem, new, old, __ATOMIC_RELEASE)
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# define atomic_compare_and_exchange_val_rel(mem, new, old) \
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__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
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mem, new, old, __ATOMIC_RELEASE)
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@ -210,10 +210,6 @@ typedef uintmax_t uatomic_max_t;
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/* Compare and exchange with "release" semantics, ie barrier before. */
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#define atomic_compare_and_exchange_bool_rel(mem, new, old) \
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__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
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mem, new, old, __MB, "")
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#define atomic_compare_and_exchange_val_rel(mem, new, old) \
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__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
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mem, new, old, __MB, "")
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@ -87,10 +87,6 @@ void __arm_link_error (void);
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/* Compare and exchange with "release" semantics, ie barrier before. */
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# define atomic_compare_and_exchange_bool_rel(mem, new, old) \
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__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
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mem, new, old, __ATOMIC_RELEASE)
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# define atomic_compare_and_exchange_val_rel(mem, new, old) \
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__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
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mem, new, old, __ATOMIC_RELEASE)
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@ -47,12 +47,6 @@ typedef uintmax_t uatomic_max_t;
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#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_bool_8_rel(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_bool_16_rel(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __tmp; \
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@ -149,10 +149,6 @@ typedef uintmax_t uatomic_max_t;
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/* Compare and exchange with "release" semantics, ie barrier before. */
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# define atomic_compare_and_exchange_bool_rel(mem, new, old) \
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__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
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mem, new, old, __ATOMIC_RELEASE)
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# define atomic_compare_and_exchange_val_rel(mem, new, old) \
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__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
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mem, new, old, __ATOMIC_RELEASE)
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@ -330,10 +326,6 @@ typedef uintmax_t uatomic_max_t;
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/* Compare and exchange with "release" semantics, ie barrier before. */
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# define atomic_compare_and_exchange_bool_rel(mem, new, old) \
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__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
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mem, new, old, MIPS_SYNC_STR, "")
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# define atomic_compare_and_exchange_val_rel(mem, new, old) \
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__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
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mem, new, old, MIPS_SYNC_STR, "")
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#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_bool_8_rel(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_bool_16_rel(mem, newval, oldval) \
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(abort (), 0)
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#ifdef UP
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# define __ARCH_ACQ_INSTR ""
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# define __ARCH_REL_INSTR ""
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__tmp != 0; \
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})
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#define __arch_compare_and_exchange_bool_32_rel(mem, newval, oldval) \
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({ \
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unsigned int __tmp; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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" stwcx. %3,0,%1\n" \
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" bne- 1b\n" \
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"2: " \
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: "=&r" (__tmp) \
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: "b" (mem), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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/* Powerpc32 processors don't implement the 64-bit (doubleword) forms of
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load and reserve (ldarx) and store conditional (stdcx.) instructions.
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So for powerpc32 we stub out the 64-bit forms. */
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@ -83,9 +67,6 @@
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#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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(abort (), (__typeof (*mem)) 0)
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#define __arch_compare_and_exchange_bool_64_rel(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_val_64_rel(mem, newval, oldval) \
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(abort (), (__typeof (*mem)) 0)
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__tmp != 0; \
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})
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#define __arch_compare_and_exchange_bool_32_rel(mem, newval, oldval) \
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({ \
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unsigned int __tmp, __tmp2; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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" clrldi %1,%1,32\n" \
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"1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
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" subf. %0,%1,%0\n" \
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" bne 2f\n" \
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" stwcx. %4,0,%2\n" \
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" bne- 1b\n" \
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"2: " \
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: "=&r" (__tmp), "=r" (__tmp2) \
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: "b" (mem), "1" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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/*
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* Only powerpc64 processors support Load doubleword and reserve index (ldarx)
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* and Store doubleword conditional indexed (stdcx) instructions. So here
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@ -96,22 +79,6 @@
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__tmp != 0; \
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})
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#define __arch_compare_and_exchange_bool_64_rel(mem, newval, oldval) \
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({ \
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unsigned long __tmp; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: ldarx %0,0,%1" MUTEX_HINT_REL "\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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" stdcx. %3,0,%1\n" \
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" bne- 1b\n" \
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"2: " \
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: "=&r" (__tmp) \
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: "b" (mem), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __tmp; \
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@ -55,11 +55,6 @@ typedef uintmax_t uatomic_max_t;
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atomic_full_barrier (); \
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atomic_compare_and_exchange_val_acq ((mem), (n), (o)); \
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})
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#define atomic_compare_and_exchange_bool_rel(mem, n, o) \
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({ \
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atomic_full_barrier (); \
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atomic_compare_and_exchange_bool_acq ((mem), (n), (o)); \
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})
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#define atomic_exchange_rel(mem, n) \
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({ \
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atomic_full_barrier (); \
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