AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-25 06:20:06 +00:00
Code Issues Packages Projects Releases Wiki Activity

* sysdeps/x86_64/rtld-memset.c: New file.

Browse Source 
2008-2-26  Harsha Jagasia  <harsha.jagasia@amd.com>

	* sysdeps/x86_64/cacheinfo.c (NOT_USED_RIGHT_NOW): Remove ifdef guards.

	* sysdeps/x86_64/memset.S: Rewrite non-SSE code path as tuned for AMD
	Barcelona machine.  Make default fall through branch of
	__x86_64_preferred_memory_instruction check as the integer code path.

2007-10-15  H.J. Lu  <hongjiu.lu@intel.com>

	* sysdeps/x86_64/cacheinfo.c
	(__x86_64_preferred_memory_instruction): New variable.
	(init_cacheinfo): Initialize __x86_64_preferred_memory_instruction.

	* sysdeps/x86_64/memset.S: Rewrite.

2008-01-08  Jakub Jelinek  <jakub@redhat.com>
	* malloc/malloc.c (public_cALLOc): For arenas other than
This commit is contained in:
Ulrich Drepper 2008-03-07 17:55:11 +00:00
parent dff3751503
commit 78c2bf0eb4
4 changed files with 1307 additions and 97 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
ChangeLog
View File

@ -1,3 +1,23 @@
2008-03-07 Ulrich Drepper <drepper@redhat.com>
* sysdeps/x86_64/rtld-memset.c: New file.
2008-2-26 Harsha Jagasia <harsha.jagasia@amd.com>
* sysdeps/x86_64/cacheinfo.c (NOT_USED_RIGHT_NOW): Remove ifdef guards.
* sysdeps/x86_64/memset.S: Rewrite non-SSE code path as tuned for AMD
Barcelona machine. Make default fall through branch of
__x86_64_preferred_memory_instruction check as the integer code path.
2007-10-15 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/cacheinfo.c
(__x86_64_preferred_memory_instruction): New variable.
(init_cacheinfo): Initialize __x86_64_preferred_memory_instruction.
* sysdeps/x86_64/memset.S: Rewrite.
2008-03-04 Jakub Jelinek <jakub@redhat.com>
* include/stdio.h (__asprintf_chk, __dprintf_chk,
@ -309,7 +329,7 @@
* stdlib/Makefile: Add rules to build and run tst-makecontext2.
* stdlib/tst-makecontext2.c: New test.
008-01-08 Jakub Jelinek <jakub@redhat.com>
2008-01-08 Jakub Jelinek <jakub@redhat.com>
* iconv/loop.c (UPDATE_PARAMS): Define to empty statement if not
defined.
@ -392,7 +412,7 @@
2007-12-17 Ulrich Drepper <drepper@redhat.com>
* malloc/malloc.c (public_cALLOc): For arena other than
* malloc/malloc.c (public_cALLOc): For arenas other than
main_arena, count all bytes inside the mprotect_size range of the
heap as uninitialized.

10
sysdeps/x86_64/cacheinfo.c
View File

@ -405,13 +405,10 @@ long int __x86_64_data_cache_size_half attribute_hidden = 32 * 1024 / 2;
/* Shared cache size for use in memory and string routines, typically
L2 or L3 size. */
long int __x86_64_shared_cache_size_half attribute_hidden = 1024 * 1024 / 2;
#ifdef NOT_USED_RIGHT_NOW
long int __x86_64_shared_cache_size attribute_hidden = 1024 * 1024;
#endif
/* PREFETCHW support flag for use in memory and string routines. */
int __x86_64_prefetchw attribute_hidden;
#ifdef NOT_USED_RIGHT_NOW
/* Instructions preferred for memory and string routines.
0: Regular instructions
@ -421,7 +418,6 @@ int __x86_64_prefetchw attribute_hidden;
*/
int __x86_64_preferred_memory_instruction attribute_hidden;
#endif
static void
@ -464,14 +460,12 @@ init_cacheinfo (void)
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "0" (1));
#ifdef NOT_USED_RIGHT_NOW
/* Intel prefers SSSE3 instructions for memory/string rountines
/* Intel prefers SSSE3 instructions for memory/string routines
if they are avaiable. */
if ((ecx & 0x200))
__x86_64_preferred_memory_instruction = 3;
else
__x86_64_preferred_memory_instruction = 2;
#endif
/* Figure out the number of logical threads that share the
highest cache level. */
@ -577,8 +571,6 @@ init_cacheinfo (void)
if (shared > 0)
{
__x86_64_shared_cache_size_half = shared / 2;
#ifdef NOT_USED_RIGHT_NOW
__x86_64_shared_cache_size = shared;
#endif
}
}

1369
sysdeps/x86_64/memset.S
View File

File diff suppressed because it is too large Load Diff

1
sysdeps/x86_64/rtld-memset.c Normal file
View File

@ -0,0 +1 @@
#include <string/memset.c>