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https://sourceware.org/git/glibc.git
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LoongArch: Add vector implementation for _dl_runtime_resolve.
This commit is contained in:
caiyinyu
parent
0d341d09f2
commit
7f079fdc16
@ -270,6 +270,10 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[],
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/* If using PLTs, fill in the first two entries of .got.plt. */
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if (l->l_info[DT_JMPREL])
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{
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#if HAVE_LOONGARCH_VEC_ASM
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extern void _dl_runtime_resolve_lasx (void) attribute_hidden;
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extern void _dl_runtime_resolve_lsx (void) attribute_hidden;
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#endif
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extern void _dl_runtime_resolve (void) attribute_hidden;
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extern void _dl_runtime_profile (void) attribute_hidden;
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@ -296,7 +300,14 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[],
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/* This function will get called to fix up the GOT entry
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indicated by the offset on the stack, and then jump to
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the resolved address. */
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gotplt[0] = (ElfW (Addr)) & _dl_runtime_resolve;
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#if HAVE_LOONGARCH_VEC_ASM
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if (SUPPORT_LASX)
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gotplt[0] = (ElfW(Addr)) &_dl_runtime_resolve_lasx;
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else if (SUPPORT_LSX)
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gotplt[0] = (ElfW(Addr)) &_dl_runtime_resolve_lsx;
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else
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#endif
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gotplt[0] = (ElfW(Addr)) &_dl_runtime_resolve;
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}
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gotplt[1] = (ElfW (Addr)) l;
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}
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@ -19,78 +19,26 @@
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#include <sysdep.h>
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#include <sys/asm.h>
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#if HAVE_LOONGARCH_VEC_ASM
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#define USE_LASX
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#define _dl_runtime_resolve _dl_runtime_resolve_lasx
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#include "dl-trampoline.h"
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#undef FRAME_SIZE
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#undef USE_LASX
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#undef _dl_runtime_resolve
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#define USE_LSX
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#define _dl_runtime_resolve _dl_runtime_resolve_lsx
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#include "dl-trampoline.h"
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#undef FRAME_SIZE
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#undef USE_LSX
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#undef _dl_runtime_resolve
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#endif
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#include "dl-trampoline.h"
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#include "dl-link.h"
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/* Assembler veneer called from the PLT header code for lazy loading.
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The PLT header passes its own args in t0-t2. */
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#ifdef __loongarch_soft_float
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#define FRAME_SIZE (-((-10 * SZREG) & ALMASK))
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#else
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#define FRAME_SIZE (-((-10 * SZREG - 8 * SZFREG) & ALMASK))
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#endif
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ENTRY (_dl_runtime_resolve)
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/* Save arguments to stack. */
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ADDI sp, sp, -FRAME_SIZE
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REG_S ra, sp, 9*SZREG
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REG_S a0, sp, 1*SZREG
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REG_S a1, sp, 2*SZREG
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REG_S a2, sp, 3*SZREG
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REG_S a3, sp, 4*SZREG
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REG_S a4, sp, 5*SZREG
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REG_S a5, sp, 6*SZREG
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REG_S a6, sp, 7*SZREG
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REG_S a7, sp, 8*SZREG
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#ifndef __loongarch_soft_float
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FREG_S fa0, sp, 10*SZREG + 0*SZFREG
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FREG_S fa1, sp, 10*SZREG + 1*SZFREG
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FREG_S fa2, sp, 10*SZREG + 2*SZFREG
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FREG_S fa3, sp, 10*SZREG + 3*SZFREG
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FREG_S fa4, sp, 10*SZREG + 4*SZFREG
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FREG_S fa5, sp, 10*SZREG + 5*SZFREG
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FREG_S fa6, sp, 10*SZREG + 6*SZFREG
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FREG_S fa7, sp, 10*SZREG + 7*SZFREG
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#endif
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/* Update .got.plt and obtain runtime address of callee */
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SLLI a1, t1, 1
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or a0, t0, zero
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ADD a1, a1, t1
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la a2, _dl_fixup
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jirl ra, a2, 0
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or t1, v0, zero
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/* Restore arguments from stack. */
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REG_L ra, sp, 9*SZREG
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REG_L a0, sp, 1*SZREG
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REG_L a1, sp, 2*SZREG
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REG_L a2, sp, 3*SZREG
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REG_L a3, sp, 4*SZREG
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REG_L a4, sp, 5*SZREG
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REG_L a5, sp, 6*SZREG
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REG_L a6, sp, 7*SZREG
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REG_L a7, sp, 8*SZREG
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#ifndef __loongarch_soft_float
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FREG_L fa0, sp, 10*SZREG + 0*SZFREG
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FREG_L fa1, sp, 10*SZREG + 1*SZFREG
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FREG_L fa2, sp, 10*SZREG + 2*SZFREG
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FREG_L fa3, sp, 10*SZREG + 3*SZFREG
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FREG_L fa4, sp, 10*SZREG + 4*SZFREG
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FREG_L fa5, sp, 10*SZREG + 5*SZFREG
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FREG_L fa6, sp, 10*SZREG + 6*SZFREG
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FREG_L fa7, sp, 10*SZREG + 7*SZFREG
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#endif
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ADDI sp, sp, FRAME_SIZE
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/* Invoke the callee. */
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jirl zero, t1, 0
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END (_dl_runtime_resolve)
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ENTRY (_dl_runtime_profile)
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/* LoongArch we get called with:
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t0 linkr_map pointer
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129
sysdeps/loongarch/dl-trampoline.h
Normal file
129
sysdeps/loongarch/dl-trampoline.h
Normal file
@ -0,0 +1,129 @@
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/* PLT trampolines.
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Copyright (C) 2022-2023 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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/* Assembler veneer called from the PLT header code for lazy loading.
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The PLT header passes its own args in t0-t2. */
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#ifndef __loongarch_soft_float
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# ifdef USE_LASX
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# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG - 8 * SZXREG) & ALMASK))
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# elif defined USE_LSX
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# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG - 8 * SZVREG) & ALMASK))
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# else
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# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG) & ALMASK))
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# endif
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#else
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# define FRAME_SIZE (-((-9 * SZREG) & ALMASK))
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#endif
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ENTRY (_dl_runtime_resolve)
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/* Save arguments to stack. */
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ADDI sp, sp, -FRAME_SIZE
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REG_S ra, sp, 0*SZREG
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REG_S a0, sp, 1*SZREG
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REG_S a1, sp, 2*SZREG
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REG_S a2, sp, 3*SZREG
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REG_S a3, sp, 4*SZREG
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REG_S a4, sp, 5*SZREG
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REG_S a5, sp, 6*SZREG
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REG_S a6, sp, 7*SZREG
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REG_S a7, sp, 8*SZREG
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#ifdef USE_LASX
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xvst xr0, sp, 9*SZREG + 8*SZFREG + 0*SZXREG
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xvst xr1, sp, 9*SZREG + 8*SZFREG + 1*SZXREG
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xvst xr2, sp, 9*SZREG + 8*SZFREG + 2*SZXREG
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xvst xr3, sp, 9*SZREG + 8*SZFREG + 3*SZXREG
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xvst xr4, sp, 9*SZREG + 8*SZFREG + 4*SZXREG
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xvst xr5, sp, 9*SZREG + 8*SZFREG + 5*SZXREG
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xvst xr6, sp, 9*SZREG + 8*SZFREG + 6*SZXREG
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xvst xr7, sp, 9*SZREG + 8*SZFREG + 7*SZXREG
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#elif defined USE_LSX
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vst vr0, sp, 9*SZREG + 8*SZFREG + 0*SZVREG
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vst vr1, sp, 9*SZREG + 8*SZFREG + 1*SZVREG
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vst vr2, sp, 9*SZREG + 8*SZFREG + 2*SZVREG
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vst vr3, sp, 9*SZREG + 8*SZFREG + 3*SZVREG
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vst vr4, sp, 9*SZREG + 8*SZFREG + 4*SZVREG
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vst vr5, sp, 9*SZREG + 8*SZFREG + 5*SZVREG
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vst vr6, sp, 9*SZREG + 8*SZFREG + 6*SZVREG
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vst vr7, sp, 9*SZREG + 8*SZFREG + 7*SZVREG
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#elif !defined __loongarch_soft_float
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FREG_S fa0, sp, 9*SZREG + 0*SZFREG
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FREG_S fa1, sp, 9*SZREG + 1*SZFREG
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FREG_S fa2, sp, 9*SZREG + 2*SZFREG
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FREG_S fa3, sp, 9*SZREG + 3*SZFREG
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FREG_S fa4, sp, 9*SZREG + 4*SZFREG
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FREG_S fa5, sp, 9*SZREG + 5*SZFREG
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FREG_S fa6, sp, 9*SZREG + 6*SZFREG
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FREG_S fa7, sp, 9*SZREG + 7*SZFREG
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#endif
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/* Update .got.plt and obtain runtime address of callee */
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SLLI a1, t1, 1
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or a0, t0, zero
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ADD a1, a1, t1
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la a2, _dl_fixup
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jirl ra, a2, 0
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or t1, v0, zero
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/* Restore arguments from stack. */
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REG_L ra, sp, 0*SZREG
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REG_L a0, sp, 1*SZREG
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REG_L a1, sp, 2*SZREG
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REG_L a2, sp, 3*SZREG
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REG_L a3, sp, 4*SZREG
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REG_L a4, sp, 5*SZREG
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REG_L a5, sp, 6*SZREG
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REG_L a6, sp, 7*SZREG
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REG_L a7, sp, 8*SZREG
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#ifdef USE_LASX
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xvld xr0, sp, 9*SZREG + 8*SZFREG + 0*SZXREG
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xvld xr1, sp, 9*SZREG + 8*SZFREG + 1*SZXREG
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xvld xr2, sp, 9*SZREG + 8*SZFREG + 2*SZXREG
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xvld xr3, sp, 9*SZREG + 8*SZFREG + 3*SZXREG
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xvld xr4, sp, 9*SZREG + 8*SZFREG + 4*SZXREG
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xvld xr5, sp, 9*SZREG + 8*SZFREG + 5*SZXREG
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xvld xr6, sp, 9*SZREG + 8*SZFREG + 6*SZXREG
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xvld xr7, sp, 9*SZREG + 8*SZFREG + 7*SZXREG
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#elif defined USE_LSX
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vld vr0, sp, 9*SZREG + 8*SZFREG + 0*SZVREG
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vld vr1, sp, 9*SZREG + 8*SZFREG + 1*SZVREG
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vld vr2, sp, 9*SZREG + 8*SZFREG + 2*SZVREG
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vld vr3, sp, 9*SZREG + 8*SZFREG + 3*SZVREG
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vld vr4, sp, 9*SZREG + 8*SZFREG + 4*SZVREG
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vld vr5, sp, 9*SZREG + 8*SZFREG + 5*SZVREG
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vld vr6, sp, 9*SZREG + 8*SZFREG + 6*SZVREG
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vld vr7, sp, 9*SZREG + 8*SZFREG + 7*SZVREG
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#elif !defined __loongarch_soft_float
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FREG_L fa0, sp, 9*SZREG + 0*SZFREG
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FREG_L fa1, sp, 9*SZREG + 1*SZFREG
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FREG_L fa2, sp, 9*SZREG + 2*SZFREG
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FREG_L fa3, sp, 9*SZREG + 3*SZFREG
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FREG_L fa4, sp, 9*SZREG + 4*SZFREG
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FREG_L fa5, sp, 9*SZREG + 5*SZFREG
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FREG_L fa6, sp, 9*SZREG + 6*SZFREG
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FREG_L fa7, sp, 9*SZREG + 7*SZFREG
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#endif
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ADDI sp, sp, FRAME_SIZE
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/* Invoke the callee. */
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jirl zero, t1, 0
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END (_dl_runtime_resolve)
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@ -20,6 +20,7 @@
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#define _LOONGARCH_LDSODEFS_H 1
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#include <elf.h>
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#include <cpu-features.h>
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struct La_loongarch_regs;
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struct La_loongarch_retval;
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@ -25,6 +25,8 @@
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/* Macros to handle different pointer/register sizes for 32/64-bit code. */
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#define SZREG 8
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#define SZFREG 8
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#define SZVREG 16
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#define SZXREG 32
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#define REG_L ld.d
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#define REG_S st.d
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#define SRLI srli.d
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@ -90,4 +90,22 @@
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#define fs6 $f30
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#define fs7 $f31
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#define vr0 $vr0
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#define vr1 $vr1
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#define vr2 $vr2
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#define vr3 $vr3
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#define vr4 $vr4
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#define vr5 $vr5
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#define vr6 $vr6
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#define vr7 $vr7
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#define xr0 $xr0
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#define xr1 $xr1
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#define xr2 $xr2
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#define xr3 $xr3
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#define xr4 $xr4
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#define xr5 $xr5
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#define xr6 $xr6
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#define xr7 $xr7
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#endif /* _SYS_REGDEF_H */
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37
sysdeps/unix/sysv/linux/loongarch/bits/hwcap.h
Normal file
37
sysdeps/unix/sysv/linux/loongarch/bits/hwcap.h
Normal file
@ -0,0 +1,37 @@
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/* Defines for bits in AT_HWCAP. LoongArch64 Linux version.
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Copyright (C) 2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#if !defined (_SYS_AUXV_H)
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# error "Never include <bits/hwcap.h> directly; use <sys/auxv.h> instead."
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#endif
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/* The following must match the kernel's <asm/hwcap.h>. */
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/* HWCAP flags */
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#define HWCAP_LOONGARCH_CPUCFG (1 << 0)
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#define HWCAP_LOONGARCH_LAM (1 << 1)
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#define HWCAP_LOONGARCH_UAL (1 << 2)
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#define HWCAP_LOONGARCH_FPU (1 << 3)
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#define HWCAP_LOONGARCH_LSX (1 << 4)
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#define HWCAP_LOONGARCH_LASX (1 << 5)
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#define HWCAP_LOONGARCH_CRC32 (1 << 6)
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#define HWCAP_LOONGARCH_COMPLEX (1 << 7)
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#define HWCAP_LOONGARCH_CRYPTO (1 << 8)
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#define HWCAP_LOONGARCH_LVZ (1 << 9)
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#define HWCAP_LOONGARCH_LBT_X86 (1 << 10)
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#define HWCAP_LOONGARCH_LBT_ARM (1 << 11)
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#define HWCAP_LOONGARCH_LBT_MIPS (1 << 12)
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29
sysdeps/unix/sysv/linux/loongarch/cpu-features.h
Normal file
29
sysdeps/unix/sysv/linux/loongarch/cpu-features.h
Normal file
@ -0,0 +1,29 @@
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/* Initialize CPU feature data. LoongArch64 version.
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This file is part of the GNU C Library.
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Copyright (C) 2022 Free Software Foundation, Inc.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _CPU_FEATURES_LOONGARCH64_H
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#define _CPU_FEATURES_LOONGARCH64_H
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#include <sys/auxv.h>
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#define SUPPORT_UAL (GLRO (dl_hwcap) & HWCAP_LOONGARCH_UAL)
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#define SUPPORT_LSX (GLRO (dl_hwcap) & HWCAP_LOONGARCH_LSX)
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#define SUPPORT_LASX (GLRO (dl_hwcap) & HWCAP_LOONGARCH_LASX)
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#endif /* _CPU_FEATURES_LOONGARCH64_H */
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