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powerpc: optimize strcpy/stpcpy for POWER9/10
This patch modifies the current POWER9 implementation of strcpy and stpcpy to optimize it for POWER9/10. Since no new POWER10 instructions are used, the original POWER9 strcpy is modified instead of creating a new implementation for POWER10. This implementation is based on both the original POWER9 implementation of strcpy and the preamble of the new POWER10 implementation of strlen. The changes also affect stpcpy, which uses the same implementation with some additional code before returning. On POWER9, averaging improvements across the benchmark inputs (length/source alignment/destination alignment), for an experiment that ran the benchmark five times, bench-strcpy showed an improvement of 5.23%, and bench-stpcpy showed an improvement of 6.59%. On POWER10, bench-strcpy showed 13.16%, and bench-stpcpy showed 13.59%. The changes are: 1. Removed the null string optimization. Although this results in a few extra cycles for the null string, in combination with the second change, this resulted in improvements for for other cases. 2. Adapted the preamble from strlen for POWER10. This is the part of the function that handles up to the first 16 bytes of the string. 3. Increased number of unrolled iterations in the main loop to 6. Reviewed-by: Matheus Castanho <msc@linux.ibm.com> Tested-by: Matheus Castanho <msc@linux.ibm.com>
This commit is contained in:
Pedro Franco de Carvalho
Matheus Castanho
parent
8241409e29
commit
813c6ec808
@ -45,105 +45,78 @@
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The implementation can load bytes past a null terminator, but only
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up to the next 16B boundary, so it never crosses a page. */
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/* Load quadword at addr+offset to vreg, check for null bytes,
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and branch to label if any are found. */
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#define CHECK16(vreg,offset,addr,label) \
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lxv vreg+32,offset(addr); \
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vcmpequb. v6,vreg,v18; \
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bne cr6,L(label);
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.machine power9
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ENTRY_TOCLESS (FUNC_NAME, 4)
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CALL_MCOUNT 2
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/* NULL string optimisation */
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lbz r0,0(r4)
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stb r0,0(r3)
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cmpwi r0,0
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beqlr
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addi r4,r4,1
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addi r11,r3,1
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vspltisb v18,0 /* Zeroes in v18 */
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vspltisb v19,-1 /* 0xFF bytes in v19 */
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neg r5,r4
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rldicl r9,r5,0,60 /* How many bytes to get source 16B aligned? */
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/* Next 16B-aligned address. Prepare address for L(loop). */
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addi r5,r4,16
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clrrdi r5,r5,4
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subf r8,r4,r5
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add r11,r3,r8
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/* Get source 16B aligned */
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/* Align data and fill bytes not loaded with non matching char. */
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lvx v0,0,r4
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lvsr v1,0,r4
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vperm v0,v18,v0,v1
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vperm v0,v19,v0,v1
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vcmpequb v6,v0,v18 /* 0xff if byte is NULL, 0x00 otherwise */
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vctzlsbb r7,v6 /* Number of trailing zeroes */
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addi r8,r7,1 /* Add null terminator */
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vcmpequb. v6,v0,v18 /* 0xff if byte is NULL, 0x00 otherwise */
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beq cr6,L(no_null)
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/* r8 = bytes including null
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r9 = bytes to get source 16B aligned
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if r8 > r9
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no null, copy r9 bytes
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else
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there is a null, copy r8 bytes and return. */
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cmpd r8,r9
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bgt L(no_null)
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sldi r10,r8,56 /* stxvl wants size in top 8 bits */
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stxvl 32+v0,r11,r10 /* Partial store */
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/* There's a null byte. */
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vctzlsbb r8,v6 /* Number of trailing zeroes */
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addi r9,r8,1 /* Add null byte. */
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sldi r10,r9,56 /* stxvl wants size in top 8 bits. */
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stxvl 32+v0,r3,r10 /* Partial store */
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#ifdef USE_AS_STPCPY
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/* stpcpy returns the dest address plus the size not counting the
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final '\0'. */
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add r3,r11,r7
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add r3,r3,r8
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#endif
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blr
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L(no_null):
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sldi r10,r9,56 /* stxvl wants size in top 8 bits */
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stxvl 32+v0,r11,r10 /* Partial store */
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add r4,r4,r9
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add r11,r11,r9
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sldi r10,r8,56 /* stxvl wants size in top 8 bits */
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stxvl 32+v0,r3,r10 /* Partial store */
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.p2align 4
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L(loop):
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lxv 32+v0,0(r4)
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vcmpequb. v6,v0,v18 /* Any zero bytes? */
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bne cr6,L(tail1)
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lxv 32+v1,16(r4)
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vcmpequb. v6,v1,v18 /* Any zero bytes? */
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bne cr6,L(tail2)
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lxv 32+v2,32(r4)
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vcmpequb. v6,v2,v18 /* Any zero bytes? */
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bne cr6,L(tail3)
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lxv 32+v3,48(r4)
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vcmpequb. v6,v3,v18 /* Any zero bytes? */
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bne cr6,L(tail4)
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CHECK16(v0,0,r5,tail1)
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CHECK16(v1,16,r5,tail2)
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CHECK16(v2,32,r5,tail3)
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CHECK16(v3,48,r5,tail4)
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CHECK16(v4,64,r5,tail5)
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CHECK16(v5,80,r5,tail6)
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stxv 32+v0,0(r11)
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stxv 32+v1,16(r11)
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stxv 32+v2,32(r11)
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stxv 32+v3,48(r11)
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stxv 32+v4,64(r11)
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stxv 32+v5,80(r11)
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addi r4,r4,64
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addi r11,r11,64
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addi r5,r5,96
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addi r11,r11,96
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b L(loop)
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.p2align 4
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L(tail1):
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vctzlsbb r8,v6
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addi r9,r8,1
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sldi r9,r9,56 /* stxvl wants size in top 8 bits */
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stxvl 32+v0,r11,r9
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#ifdef USE_AS_STPCPY
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/* stpcpy returns the dest address plus the size not counting the
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final '\0'. */
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add r3,r11,r8
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#endif
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blr
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L(tail2):
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stxv 32+v0,0(r11)
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vctzlsbb r8,v6 /* Number of trailing zeroes */
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addi r9,r8,1 /* Add null terminator */
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sldi r10,r9,56 /* stxvl wants size in top 8 bits */
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addi r11,r11,16
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stxvl 32+v1,r11,r10 /* Partial store */
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sldi r9,r9,56 /* stxvl wants size in top 8 bits */
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stxvl 32+v0,r11,r9 /* Partial store */
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#ifdef USE_AS_STPCPY
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/* stpcpy returns the dest address plus the size not counting the
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final '\0'. */
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@ -151,36 +124,81 @@ L(tail2):
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#endif
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blr
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.p2align 4
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L(tail2):
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stxv 32+v0,0(r11)
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vctzlsbb r8,v6
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addi r9,r8,1
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sldi r9,r9,56
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addi r11,r11,16
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stxvl 32+v1,r11,r9
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#ifdef USE_AS_STPCPY
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add r3,r11,r8
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#endif
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blr
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.p2align 4
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L(tail3):
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stxv 32+v0,0(r11)
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stxv 32+v1,16(r11)
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vctzlsbb r8,v6 /* Number of trailing zeroes */
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addi r9,r8,1 /* Add null terminator */
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sldi r10,r9,56 /* stxvl wants size in top 8 bits */
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vctzlsbb r8,v6
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addi r9,r8,1
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sldi r9,r9,56
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addi r11,r11,32
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stxvl 32+v2,r11,r10 /* Partial store */
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stxvl 32+v2,r11,r9
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#ifdef USE_AS_STPCPY
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/* stpcpy returns the dest address plus the size not counting the
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final '\0'. */
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add r3,r11,r8
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#endif
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blr
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.p2align 4
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L(tail4):
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stxv 32+v0,0(r11)
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stxv 32+v1,16(r11)
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stxv 32+v2,32(r11)
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vctzlsbb r8,v6 /* Number of trailing zeroes */
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addi r9,r8,1 /* Add null terminator */
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sldi r10,r9,56 /* stxvl wants size in top 8 bits */
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vctzlsbb r8,v6
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addi r9,r8,1
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sldi r9,r9,56
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addi r11,r11,48
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stxvl 32+v3,r11,r10 /* Partial store */
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stxvl 32+v3,r11,r9
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#ifdef USE_AS_STPCPY
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/* stpcpy returns the dest address plus the size not counting the
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final '\0'. */
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add r3,r11,r8
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#endif
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blr
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.p2align 4
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L(tail5):
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stxv 32+v0,0(r11)
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stxv 32+v1,16(r11)
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stxv 32+v2,32(r11)
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stxv 32+v3,48(r11)
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vctzlsbb r8,v6
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addi r9,r8,1
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sldi r9,r9,56
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addi r11,r11,64
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stxvl 32+v4,r11,r9
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#ifdef USE_AS_STPCPY
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add r3,r11,r8
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#endif
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blr
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.p2align 4
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L(tail6):
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stxv 32+v0,0(r11)
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stxv 32+v1,16(r11)
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stxv 32+v2,32(r11)
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stxv 32+v3,48(r11)
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stxv 32+v4,64(r11)
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vctzlsbb r8,v6
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addi r9,r8,1
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sldi r9,r9,56
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addi r11,r11,80
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stxvl 32+v5,r11,r9
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#ifdef USE_AS_STPCPY
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add r3,r11,r8
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#endif
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blr
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END (FUNC_NAME)
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#ifndef USE_AS_STPCPY
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libc_hidden_builtin_def (strcpy)
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