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Mark sparc %fsr load and store inline asms as volatile.

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* sysdeps/sparc/fpu/bits/fenv.h (__fenv_stfsr): Add __volatile__.
	* sysdeps/sparc/fpu/fpu_control.h (_FPU_GETCW):	Likewise.
	(_FPU_SETCW): Likewise.
This commit is contained in:
David S. Miller 2012-05-11 13:58:41 -07:00
parent 1cf463cd4e
commit 842b81d611
3 changed files with 12 additions and 6 deletions
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6
ChangeLog
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@ -1,3 +1,9 @@
2012-05-11 David S. Miller <davem@davemloft.net>
* sysdeps/sparc/fpu/bits/fenv.h (__fenv_stfsr): Add __volatile__.
* sysdeps/sparc/fpu/fpu_control.h (_FPU_GETCW): Likewise.
(_FPU_SETCW): Likewise.
2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/dl-trampoline.S: Check if RTLD_SAVESPACE_SSE

4
sysdeps/sparc/fpu/bits/fenv.h
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@ -76,9 +76,9 @@ typedef unsigned long int fenv_t;
/* For internal use only: access the fp state register. */
#if __WORDSIZE == 64
# define __fenv_stfsr(X) __asm__ ("stx %%fsr,%0" : "=m" (X))
# define __fenv_stfsr(X) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (X))
# define __fenv_ldfsr(X) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (X))
#else
# define __fenv_stfsr(X) __asm__ ("st %%fsr,%0" : "=m" (X))
# define __fenv_stfsr(X) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (X))
# define __fenv_ldfsr(X) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X))
#endif

8
sysdeps/sparc/fpu/fpu_control.h
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@ -59,11 +59,11 @@
typedef unsigned long int fpu_control_t;
#if __WORDSIZE == 64
# define _FPU_GETCW(cw) __asm__ ("stx %%fsr,%0" : "=m" (*&cw))
# define _FPU_SETCW(cw) __asm__ ("ldx %0,%%fsr" : : "m" (*&cw))
# define _FPU_GETCW(cw) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (*&cw))
# define _FPU_SETCW(cw) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (*&cw))
#else
# define _FPU_GETCW(cw) __asm__ ("st %%fsr,%0" : "=m" (*&cw))
# define _FPU_SETCW(cw) __asm__ ("ld %0,%%fsr" : : "m" (*&cw))
# define _FPU_GETCW(cw) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (*&cw))
# define _FPU_SETCW(cw) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (*&cw))
#endif
/* Default control word set at startup. */