mirror of
https://sourceware.org/git/glibc.git
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aarch64/fpu: Add vector variants of erfc
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
This commit is contained in:
Joe Ramsay
Szabolcs Nagy
parent
3d3a4fb8e4
commit
87cb1dfcd6
@ -8,6 +8,7 @@ libmvec-supported-funcs = acos \
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cos \
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cosh \
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erf \
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erfc \
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exp \
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exp10 \
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exp2 \
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@ -39,7 +40,9 @@ libmvec-support = $(addsuffix f_advsimd,$(float-advsimd-funcs)) \
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erff_data \
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sv_erf_data \
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sv_erff_data \
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v_exp_tail_data
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v_exp_tail_data \
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erfc_data \
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erfcf_data
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endif
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sve-cflags = -march=armv8-a+sve
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@ -104,6 +104,11 @@ libmvec {
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_ZGVnN4v_erff;
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_ZGVsMxv_erf;
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_ZGVsMxv_erff;
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_ZGVnN2v_erfc;
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_ZGVnN2v_erfcf;
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_ZGVnN4v_erfcf;
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_ZGVsMxv_erfc;
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_ZGVsMxv_erfcf;
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_ZGVnN2v_sinh;
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_ZGVnN2v_sinhf;
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_ZGVnN4v_sinhf;
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@ -26,6 +26,7 @@ libmvec_hidden_proto (V_NAME_F1(atanh));
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libmvec_hidden_proto (V_NAME_F1(cos));
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libmvec_hidden_proto (V_NAME_F1(cosh));
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libmvec_hidden_proto (V_NAME_F1(erf));
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libmvec_hidden_proto (V_NAME_F1(erfc));
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libmvec_hidden_proto (V_NAME_F1(exp10));
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libmvec_hidden_proto (V_NAME_F1(exp2));
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libmvec_hidden_proto (V_NAME_F1(exp));
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@ -69,6 +69,10 @@
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# define __DECL_SIMD_erf __DECL_SIMD_aarch64
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# undef __DECL_SIMD_erff
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# define __DECL_SIMD_erff __DECL_SIMD_aarch64
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# undef __DECL_SIMD_erfc
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# define __DECL_SIMD_erfc __DECL_SIMD_aarch64
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# undef __DECL_SIMD_erfcf
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# define __DECL_SIMD_erfcf __DECL_SIMD_aarch64
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# undef __DECL_SIMD_exp
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# define __DECL_SIMD_exp __DECL_SIMD_aarch64
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# undef __DECL_SIMD_expf
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@ -153,6 +157,7 @@ __vpcs __f32x4_t _ZGVnN4v_atanhf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_cosf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_coshf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_erff (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_erfcf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_expf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_exp10f (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_exp2f (__f32x4_t);
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@ -176,6 +181,7 @@ __vpcs __f64x2_t _ZGVnN2v_atanh (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_cos (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_cosh (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_erf (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_erfc (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_exp (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_exp10 (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_exp2 (__f64x2_t);
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@ -204,6 +210,7 @@ __sv_f32_t _ZGVsMxv_atanhf (__sv_f32_t, __sv_bool_t);
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__sv_f32_t _ZGVsMxv_cosf (__sv_f32_t, __sv_bool_t);
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__sv_f32_t _ZGVsMxv_coshf (__sv_f32_t, __sv_bool_t);
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__sv_f32_t _ZGVsMxv_erff (__sv_f32_t, __sv_bool_t);
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__sv_f32_t _ZGVsMxv_erfcf (__sv_f32_t, __sv_bool_t);
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__sv_f32_t _ZGVsMxv_expf (__sv_f32_t, __sv_bool_t);
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__sv_f32_t _ZGVsMxv_exp10f (__sv_f32_t, __sv_bool_t);
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__sv_f32_t _ZGVsMxv_exp2f (__sv_f32_t, __sv_bool_t);
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@ -227,6 +234,7 @@ __sv_f64_t _ZGVsMxv_atanh (__sv_f64_t, __sv_bool_t);
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__sv_f64_t _ZGVsMxv_cos (__sv_f64_t, __sv_bool_t);
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__sv_f64_t _ZGVsMxv_cosh (__sv_f64_t, __sv_bool_t);
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__sv_f64_t _ZGVsMxv_erf (__sv_f64_t, __sv_bool_t);
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__sv_f64_t _ZGVsMxv_erfc (__sv_f64_t, __sv_bool_t);
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__sv_f64_t _ZGVsMxv_exp (__sv_f64_t, __sv_bool_t);
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__sv_f64_t _ZGVsMxv_exp10 (__sv_f64_t, __sv_bool_t);
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__sv_f64_t _ZGVsMxv_exp2 (__sv_f64_t, __sv_bool_t);
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201
sysdeps/aarch64/fpu/erfc_advsimd.c
Normal file
201
sysdeps/aarch64/fpu/erfc_advsimd.c
Normal file
@ -0,0 +1,201 @@
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/* Double-precision vector (Advanced SIMD) erfc function
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include "v_math.h"
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#include "vecmath_config.h"
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static const struct data
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{
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uint64x2_t offset, table_scale;
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float64x2_t max, shift;
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float64x2_t p20, p40, p41, p42;
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float64x2_t p51, p52;
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float64x2_t qr5, qr6, qr7, qr8, qr9;
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#if WANT_SIMD_EXCEPT
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float64x2_t uflow_bound;
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#endif
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} data = {
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/* Set an offset so the range of the index used for lookup is 3487, and it
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can be clamped using a saturated add on an offset index.
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Index offset is 0xffffffffffffffff - asuint64(shift) - 3487. */
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.offset = V2 (0xbd3ffffffffff260),
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.table_scale = V2 (0x37f0000000000000 << 1), /* asuint64 (2^-128) << 1. */
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.max = V2 (0x1.b3ep+4), /* 3487/128. */
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.shift = V2 (0x1p45),
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.p20 = V2 (0x1.5555555555555p-2), /* 1/3, used to compute 2/3 and 1/6. */
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.p40 = V2 (-0x1.999999999999ap-4), /* 1/10. */
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.p41 = V2 (-0x1.999999999999ap-2), /* 2/5. */
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.p42 = V2 (0x1.1111111111111p-3), /* 2/15. */
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.p51 = V2 (-0x1.c71c71c71c71cp-3), /* 2/9. */
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.p52 = V2 (0x1.6c16c16c16c17p-5), /* 2/45. */
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/* Qi = (i+1) / i, Ri = -2 * i / ((i+1)*(i+2)), for i = 5, ..., 9. */
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.qr5 = { 0x1.3333333333333p0, -0x1.e79e79e79e79ep-3 },
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.qr6 = { 0x1.2aaaaaaaaaaabp0, -0x1.b6db6db6db6dbp-3 },
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.qr7 = { 0x1.2492492492492p0, -0x1.8e38e38e38e39p-3 },
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.qr8 = { 0x1.2p0, -0x1.6c16c16c16c17p-3 },
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.qr9 = { 0x1.1c71c71c71c72p0, -0x1.4f2094f2094f2p-3 },
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#if WANT_SIMD_EXCEPT
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.uflow_bound = V2 (0x1.a8b12fc6e4892p+4),
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#endif
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};
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#define TinyBound 0x4000000000000000 /* 0x1p-511 << 1. */
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#define Off 0xfffffffffffff260 /* 0xffffffffffffffff - 3487. */
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struct entry
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{
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float64x2_t erfc;
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float64x2_t scale;
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};
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static inline struct entry
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lookup (uint64x2_t i)
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{
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struct entry e;
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float64x2_t e1 = vld1q_f64 ((float64_t *) (__erfc_data.tab - Off + i[0])),
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e2 = vld1q_f64 ((float64_t *) (__erfc_data.tab - Off + i[1]));
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e.erfc = vuzp1q_f64 (e1, e2);
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e.scale = vuzp2q_f64 (e1, e2);
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return e;
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}
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#if WANT_SIMD_EXCEPT
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static float64x2_t VPCS_ATTR NOINLINE
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special_case (float64x2_t x, float64x2_t y, uint64x2_t cmp)
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{
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return v_call_f64 (erfc, x, y, cmp);
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}
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#endif
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/* Optimized double-precision vector erfc(x).
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Approximation based on series expansion near x rounded to
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nearest multiple of 1/128.
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Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r,
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erfc(x) ~ erfc(r) - scale * d * poly(r, d), with
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poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3
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+ (2/15 r^4 - 2/5 r^2 + 1/10) d^4
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- r * (2/45 r^4 - 2/9 r^2 + 1/6) d^5
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+ p6(r) d^6 + ... + p10(r) d^10
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Polynomials p6(r) to p10(r) are computed using recurrence relation
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2(i+1)p_i + 2r(i+2)p_{i+1} + (i+2)(i+3)p_{i+2} = 0,
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with p0 = 1, and p1(r) = -r.
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Values of erfc(r) and scale are read from lookup tables. Stored values
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are scaled to avoid hitting the subnormal range.
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Note that for x < 0, erfc(x) = 2.0 - erfc(-x).
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Maximum measured error: 1.71 ULP
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V_NAME_D1 (erfc)(0x1.46cfe976733p+4) got 0x1.e15fcbea3e7afp-608
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want 0x1.e15fcbea3e7adp-608. */
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VPCS_ATTR
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float64x2_t V_NAME_D1 (erfc) (float64x2_t x)
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{
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const struct data *dat = ptr_barrier (&data);
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#if WANT_SIMD_EXCEPT
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/* |x| < 2^-511. Avoid fabs by left-shifting by 1. */
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uint64x2_t ix = vreinterpretq_u64_f64 (x);
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uint64x2_t cmp = vcltq_u64 (vaddq_u64 (ix, ix), v_u64 (TinyBound));
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/* x >= ~26.54 (into subnormal case and uflow case). Comparison is done in
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integer domain to avoid raising exceptions in presence of nans. */
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uint64x2_t uflow = vcgeq_s64 (vreinterpretq_s64_f64 (x),
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vreinterpretq_s64_f64 (dat->uflow_bound));
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cmp = vorrq_u64 (cmp, uflow);
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float64x2_t xm = x;
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/* If any lanes are special, mask them with 0 and retain a copy of x to allow
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special case handler to fix special lanes later. This is only necessary if
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fenv exceptions are to be triggered correctly. */
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if (__glibc_unlikely (v_any_u64 (cmp)))
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x = v_zerofy_f64 (x, cmp);
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#endif
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float64x2_t a = vabsq_f64 (x);
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a = vminq_f64 (a, dat->max);
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/* Lookup erfc(r) and scale(r) in tables, e.g. set erfc(r) to 0 and scale to
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2/sqrt(pi), when x reduced to r = 0. */
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float64x2_t shift = dat->shift;
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float64x2_t z = vaddq_f64 (a, shift);
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/* Clamp index to a range of 3487. A naive approach would use a subtract and
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min. Instead we offset the table address and the index, then use a
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saturating add. */
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uint64x2_t i = vqaddq_u64 (vreinterpretq_u64_f64 (z), dat->offset);
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struct entry e = lookup (i);
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/* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */
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float64x2_t r = vsubq_f64 (z, shift);
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float64x2_t d = vsubq_f64 (a, r);
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float64x2_t d2 = vmulq_f64 (d, d);
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float64x2_t r2 = vmulq_f64 (r, r);
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float64x2_t p1 = r;
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float64x2_t p2 = vfmsq_f64 (dat->p20, r2, vaddq_f64 (dat->p20, dat->p20));
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float64x2_t p3 = vmulq_f64 (r, vfmaq_f64 (v_f64 (-0.5), r2, dat->p20));
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float64x2_t p4 = vfmaq_f64 (dat->p41, r2, dat->p42);
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p4 = vfmsq_f64 (dat->p40, r2, p4);
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float64x2_t p5 = vfmaq_f64 (dat->p51, r2, dat->p52);
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p5 = vmulq_f64 (r, vfmaq_f64 (vmulq_f64 (v_f64 (0.5), dat->p20), r2, p5));
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/* Compute p_i using recurrence relation:
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p_{i+2} = (p_i + r * Q_{i+1} * p_{i+1}) * R_{i+1}. */
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float64x2_t p6 = vfmaq_f64 (p4, p5, vmulq_laneq_f64 (r, dat->qr5, 0));
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p6 = vmulq_laneq_f64 (p6, dat->qr5, 1);
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float64x2_t p7 = vfmaq_f64 (p5, p6, vmulq_laneq_f64 (r, dat->qr6, 0));
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p7 = vmulq_laneq_f64 (p7, dat->qr6, 1);
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float64x2_t p8 = vfmaq_f64 (p6, p7, vmulq_laneq_f64 (r, dat->qr7, 0));
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p8 = vmulq_laneq_f64 (p8, dat->qr7, 1);
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float64x2_t p9 = vfmaq_f64 (p7, p8, vmulq_laneq_f64 (r, dat->qr8, 0));
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p9 = vmulq_laneq_f64 (p9, dat->qr8, 1);
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float64x2_t p10 = vfmaq_f64 (p8, p9, vmulq_laneq_f64 (r, dat->qr9, 0));
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p10 = vmulq_laneq_f64 (p10, dat->qr9, 1);
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/* Compute polynomial in d using pairwise Horner scheme. */
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float64x2_t p90 = vfmaq_f64 (p9, d, p10);
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float64x2_t p78 = vfmaq_f64 (p7, d, p8);
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float64x2_t p56 = vfmaq_f64 (p5, d, p6);
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float64x2_t p34 = vfmaq_f64 (p3, d, p4);
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float64x2_t p12 = vfmaq_f64 (p1, d, p2);
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float64x2_t y = vfmaq_f64 (p78, d2, p90);
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y = vfmaq_f64 (p56, d2, y);
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y = vfmaq_f64 (p34, d2, y);
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y = vfmaq_f64 (p12, d2, y);
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y = vfmsq_f64 (e.erfc, e.scale, vfmsq_f64 (d, d2, y));
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/* Offset equals 2.0 if sign, else 0.0. */
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uint64x2_t sign = vshrq_n_u64 (vreinterpretq_u64_f64 (x), 63);
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float64x2_t off = vreinterpretq_f64_u64 (vshlq_n_u64 (sign, 62));
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/* Copy sign and scale back in a single fma. Since the bit patterns do not
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overlap, then logical or and addition are equivalent here. */
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float64x2_t fac = vreinterpretq_f64_u64 (
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vsraq_n_u64 (vshlq_n_u64 (sign, 63), dat->table_scale, 1));
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#if WANT_SIMD_EXCEPT
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if (__glibc_unlikely (v_any_u64 (cmp)))
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return special_case (xm, vfmaq_f64 (off, fac, y), cmp);
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#endif
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return vfmaq_f64 (off, fac, y);
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}
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3519
sysdeps/aarch64/fpu/erfc_data.c
Normal file
3519
sysdeps/aarch64/fpu/erfc_data.c
Normal file
File diff suppressed because it is too large
Load Diff
167
sysdeps/aarch64/fpu/erfc_sve.c
Normal file
167
sysdeps/aarch64/fpu/erfc_sve.c
Normal file
@ -0,0 +1,167 @@
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/* Double-precision vector (SVE) erfc function
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
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version 2.1 of the License, or (at your option) any later version.
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|
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The GNU C Library is distributed in the hope that it will be useful,
|
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, see
|
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<https://www.gnu.org/licenses/>. */
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#include "sv_math.h"
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#include "vecmath_config.h"
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static const struct data
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{
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uint64_t off_idx, off_arr;
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double max, shift;
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double p20, p40, p41, p42;
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double p51, p52;
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double q5, r5;
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double q6, r6;
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double q7, r7;
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double q8, r8;
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double q9, r9;
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uint64_t table_scale;
|
||||
} data = {
|
||||
/* Set an offset so the range of the index used for lookup is 3487, and it
|
||||
can be clamped using a saturated add on an offset index.
|
||||
Index offset is 0xffffffffffffffff - asuint64(shift) - 3487. */
|
||||
.off_idx = 0xbd3ffffffffff260,
|
||||
.off_arr = 0xfffffffffffff260, /* 0xffffffffffffffff - 3487. */
|
||||
.max = 0x1.b3ep+4, /* 3487/128. */
|
||||
.shift = 0x1p45,
|
||||
.table_scale = 0x37f0000000000000, /* asuint64(0x1p-128). */
|
||||
.p20 = 0x1.5555555555555p-2, /* 1/3, used to compute 2/3 and 1/6. */
|
||||
.p40 = -0x1.999999999999ap-4, /* 1/10. */
|
||||
.p41 = -0x1.999999999999ap-2, /* 2/5. */
|
||||
.p42 = 0x1.1111111111111p-3, /* 2/15. */
|
||||
.p51 = -0x1.c71c71c71c71cp-3, /* 2/9. */
|
||||
.p52 = 0x1.6c16c16c16c17p-5, /* 2/45. */
|
||||
/* Qi = (i+1) / i, for i = 5, ..., 9. */
|
||||
.q5 = 0x1.3333333333333p0,
|
||||
.q6 = 0x1.2aaaaaaaaaaabp0,
|
||||
.q7 = 0x1.2492492492492p0,
|
||||
.q8 = 0x1.2p0,
|
||||
.q9 = 0x1.1c71c71c71c72p0,
|
||||
/* Ri = -2 * i / ((i+1)*(i+2)), for i = 5, ..., 9. */
|
||||
.r5 = -0x1.e79e79e79e79ep-3,
|
||||
.r6 = -0x1.b6db6db6db6dbp-3,
|
||||
.r7 = -0x1.8e38e38e38e39p-3,
|
||||
.r8 = -0x1.6c16c16c16c17p-3,
|
||||
.r9 = -0x1.4f2094f2094f2p-3,
|
||||
};
|
||||
|
||||
/* Optimized double-precision vector erfc(x).
|
||||
Approximation based on series expansion near x rounded to
|
||||
nearest multiple of 1/128.
|
||||
Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r,
|
||||
|
||||
erfc(x) ~ erfc(r) - scale * d * poly(r, d), with
|
||||
|
||||
poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3
|
||||
+ (2/15 r^4 - 2/5 r^2 + 1/10) d^4
|
||||
- r * (2/45 r^4 - 2/9 r^2 + 1/6) d^5
|
||||
+ p6(r) d^6 + ... + p10(r) d^10
|
||||
|
||||
Polynomials p6(r) to p10(r) are computed using recurrence relation
|
||||
|
||||
2(i+1)p_i + 2r(i+2)p_{i+1} + (i+2)(i+3)p_{i+2} = 0,
|
||||
with p0 = 1, and p1(r) = -r.
|
||||
|
||||
Values of erfc(r) and scale are read from lookup tables. Stored values
|
||||
are scaled to avoid hitting the subnormal range.
|
||||
|
||||
Note that for x < 0, erfc(x) = 2.0 - erfc(-x).
|
||||
|
||||
Maximum measured error: 1.71 ULP
|
||||
_ZGVsMxv_erfc(0x1.46cfe976733p+4) got 0x1.e15fcbea3e7afp-608
|
||||
want 0x1.e15fcbea3e7adp-608. */
|
||||
svfloat64_t SV_NAME_D1 (erfc) (svfloat64_t x, const svbool_t pg)
|
||||
{
|
||||
const struct data *dat = ptr_barrier (&data);
|
||||
|
||||
svfloat64_t a = svabs_x (pg, x);
|
||||
|
||||
/* Clamp input at |x| <= 3487/128. */
|
||||
a = svmin_x (pg, a, dat->max);
|
||||
|
||||
/* Reduce x to the nearest multiple of 1/128. */
|
||||
svfloat64_t shift = sv_f64 (dat->shift);
|
||||
svfloat64_t z = svadd_x (pg, a, shift);
|
||||
|
||||
/* Saturate index for the NaN case. */
|
||||
svuint64_t i = svqadd (svreinterpret_u64 (z), dat->off_idx);
|
||||
|
||||
/* Lookup erfc(r) and 2/sqrt(pi)*exp(-r^2) in tables. */
|
||||
i = svadd_x (pg, i, i);
|
||||
const float64_t *p = &__erfc_data.tab[0].erfc - 2 * dat->off_arr;
|
||||
svfloat64_t erfcr = svld1_gather_index (pg, p, i);
|
||||
svfloat64_t scale = svld1_gather_index (pg, p + 1, i);
|
||||
|
||||
/* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */
|
||||
svfloat64_t r = svsub_x (pg, z, shift);
|
||||
svfloat64_t d = svsub_x (pg, a, r);
|
||||
svfloat64_t d2 = svmul_x (pg, d, d);
|
||||
svfloat64_t r2 = svmul_x (pg, r, r);
|
||||
|
||||
/* poly (d, r) = 1 + p1(r) * d + p2(r) * d^2 + ... + p9(r) * d^9. */
|
||||
svfloat64_t p1 = r;
|
||||
svfloat64_t third = sv_f64 (dat->p20);
|
||||
svfloat64_t twothird = svmul_x (pg, third, 2.0);
|
||||
svfloat64_t sixth = svmul_x (pg, third, 0.5);
|
||||
svfloat64_t p2 = svmls_x (pg, third, r2, twothird);
|
||||
svfloat64_t p3 = svmad_x (pg, r2, third, -0.5);
|
||||
p3 = svmul_x (pg, r, p3);
|
||||
svfloat64_t p4 = svmla_x (pg, sv_f64 (dat->p41), r2, dat->p42);
|
||||
p4 = svmls_x (pg, sv_f64 (dat->p40), r2, p4);
|
||||
svfloat64_t p5 = svmla_x (pg, sv_f64 (dat->p51), r2, dat->p52);
|
||||
p5 = svmla_x (pg, sixth, r2, p5);
|
||||
p5 = svmul_x (pg, r, p5);
|
||||
/* Compute p_i using recurrence relation:
|
||||
p_{i+2} = (p_i + r * Q_{i+1} * p_{i+1}) * R_{i+1}. */
|
||||
svfloat64_t qr5 = svld1rq (svptrue_b64 (), &dat->q5);
|
||||
svfloat64_t qr6 = svld1rq (svptrue_b64 (), &dat->q6);
|
||||
svfloat64_t qr7 = svld1rq (svptrue_b64 (), &dat->q7);
|
||||
svfloat64_t qr8 = svld1rq (svptrue_b64 (), &dat->q8);
|
||||
svfloat64_t qr9 = svld1rq (svptrue_b64 (), &dat->q9);
|
||||
svfloat64_t p6 = svmla_x (pg, p4, p5, svmul_lane (r, qr5, 0));
|
||||
p6 = svmul_lane (p6, qr5, 1);
|
||||
svfloat64_t p7 = svmla_x (pg, p5, p6, svmul_lane (r, qr6, 0));
|
||||
p7 = svmul_lane (p7, qr6, 1);
|
||||
svfloat64_t p8 = svmla_x (pg, p6, p7, svmul_lane (r, qr7, 0));
|
||||
p8 = svmul_lane (p8, qr7, 1);
|
||||
svfloat64_t p9 = svmla_x (pg, p7, p8, svmul_lane (r, qr8, 0));
|
||||
p9 = svmul_lane (p9, qr8, 1);
|
||||
svfloat64_t p10 = svmla_x (pg, p8, p9, svmul_lane (r, qr9, 0));
|
||||
p10 = svmul_lane (p10, qr9, 1);
|
||||
/* Compute polynomial in d using pairwise Horner scheme. */
|
||||
svfloat64_t p90 = svmla_x (pg, p9, d, p10);
|
||||
svfloat64_t p78 = svmla_x (pg, p7, d, p8);
|
||||
svfloat64_t p56 = svmla_x (pg, p5, d, p6);
|
||||
svfloat64_t p34 = svmla_x (pg, p3, d, p4);
|
||||
svfloat64_t p12 = svmla_x (pg, p1, d, p2);
|
||||
svfloat64_t y = svmla_x (pg, p78, d2, p90);
|
||||
y = svmla_x (pg, p56, d2, y);
|
||||
y = svmla_x (pg, p34, d2, y);
|
||||
y = svmla_x (pg, p12, d2, y);
|
||||
|
||||
y = svmls_x (pg, erfcr, scale, svmls_x (pg, d, d2, y));
|
||||
|
||||
/* Offset equals 2.0 if sign, else 0.0. */
|
||||
svuint64_t sign = svand_x (pg, svreinterpret_u64 (x), 0x8000000000000000);
|
||||
svfloat64_t off = svreinterpret_f64 (svlsr_x (pg, sign, 1));
|
||||
/* Handle sign and scale back in a single fma. */
|
||||
svfloat64_t fac = svreinterpret_f64 (svorr_x (pg, sign, dat->table_scale));
|
||||
|
||||
return svmla_x (pg, off, fac, y);
|
||||
}
|
||||
170
sysdeps/aarch64/fpu/erfcf_advsimd.c
Normal file
170
sysdeps/aarch64/fpu/erfcf_advsimd.c
Normal file
@ -0,0 +1,170 @@
|
||||
/* Single-precision vector (Advanced SIMD) erfc function
|
||||
|
||||
Copyright (C) 2024 Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
|
||||
The GNU C Library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
The GNU C Library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, see
|
||||
<https://www.gnu.org/licenses/>. */
|
||||
|
||||
#include "v_math.h"
|
||||
|
||||
static const struct data
|
||||
{
|
||||
uint32x4_t offset, table_scale;
|
||||
float32x4_t max, shift;
|
||||
float32x4_t coeffs, third, two_over_five, tenth;
|
||||
#if WANT_SIMD_EXCEPT
|
||||
float32x4_t uflow_bound;
|
||||
#endif
|
||||
|
||||
} data = {
|
||||
/* Set an offset so the range of the index used for lookup is 644, and it can
|
||||
be clamped using a saturated add. */
|
||||
.offset = V4 (0xb7fffd7b), /* 0xffffffff - asuint(shift) - 644. */
|
||||
.table_scale = V4 (0x28000000 << 1), /* asuint (2^-47) << 1. */
|
||||
.max = V4 (10.0625f), /* 10 + 1/16 = 644/64. */
|
||||
.shift = V4 (0x1p17f),
|
||||
/* Store 1/3, 2/3 and 2/15 in a single register for use with indexed muls and
|
||||
fmas. */
|
||||
.coeffs = (float32x4_t){ 0x1.555556p-2f, 0x1.555556p-1f, 0x1.111112p-3f, 0 },
|
||||
.third = V4 (0x1.555556p-2f),
|
||||
.two_over_five = V4 (-0x1.99999ap-2f),
|
||||
.tenth = V4 (-0x1.99999ap-4f),
|
||||
#if WANT_SIMD_EXCEPT
|
||||
.uflow_bound = V4 (0x1.2639cp+3f),
|
||||
#endif
|
||||
};
|
||||
|
||||
#define TinyBound 0x41000000 /* 0x1p-62f << 1. */
|
||||
#define Thres 0xbe000000 /* asuint(infinity) << 1 - TinyBound. */
|
||||
#define Off 0xfffffd7b /* 0xffffffff - 644. */
|
||||
|
||||
struct entry
|
||||
{
|
||||
float32x4_t erfc;
|
||||
float32x4_t scale;
|
||||
};
|
||||
|
||||
static inline struct entry
|
||||
lookup (uint32x4_t i)
|
||||
{
|
||||
struct entry e;
|
||||
float64_t t0 = *((float64_t *) (__erfcf_data.tab - Off + i[0]));
|
||||
float64_t t1 = *((float64_t *) (__erfcf_data.tab - Off + i[1]));
|
||||
float64_t t2 = *((float64_t *) (__erfcf_data.tab - Off + i[2]));
|
||||
float64_t t3 = *((float64_t *) (__erfcf_data.tab - Off + i[3]));
|
||||
float32x4_t e1 = vreinterpretq_f32_f64 ((float64x2_t){ t0, t1 });
|
||||
float32x4_t e2 = vreinterpretq_f32_f64 ((float64x2_t){ t2, t3 });
|
||||
e.erfc = vuzp1q_f32 (e1, e2);
|
||||
e.scale = vuzp2q_f32 (e1, e2);
|
||||
return e;
|
||||
}
|
||||
|
||||
#if WANT_SIMD_EXCEPT
|
||||
static float32x4_t VPCS_ATTR NOINLINE
|
||||
special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp)
|
||||
{
|
||||
return v_call_f32 (erfcf, x, y, cmp);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Optimized single-precision vector erfcf(x).
|
||||
Approximation based on series expansion near x rounded to
|
||||
nearest multiple of 1/64.
|
||||
Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r,
|
||||
|
||||
erfc(x) ~ erfc(r) - scale * d * poly(r, d), with
|
||||
|
||||
poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3
|
||||
+ (2/15 r^4 - 2/5 r^2 + 1/10) d^4
|
||||
|
||||
Values of erfc(r) and scale are read from lookup tables. Stored values
|
||||
are scaled to avoid hitting the subnormal range.
|
||||
|
||||
Note that for x < 0, erfc(x) = 2.0 - erfc(-x).
|
||||
Maximum error: 1.63 ULP (~1.0 ULP for x < 0.0).
|
||||
_ZGVnN4v_erfcf(0x1.1dbf7ap+3) got 0x1.f51212p-120
|
||||
want 0x1.f51216p-120. */
|
||||
VPCS_ATTR
|
||||
float32x4_t NOINLINE V_NAME_F1 (erfc) (float32x4_t x)
|
||||
{
|
||||
const struct data *dat = ptr_barrier (&data);
|
||||
|
||||
#if WANT_SIMD_EXCEPT
|
||||
/* |x| < 2^-62. Avoid fabs by left-shifting by 1. */
|
||||
uint32x4_t ix = vreinterpretq_u32_f32 (x);
|
||||
uint32x4_t cmp = vcltq_u32 (vaddq_u32 (ix, ix), v_u32 (TinyBound));
|
||||
/* x >= ~9.19 (into subnormal case and uflow case). Comparison is done in
|
||||
integer domain to avoid raising exceptions in presence of nans. */
|
||||
uint32x4_t uflow = vcgeq_s32 (vreinterpretq_s32_f32 (x),
|
||||
vreinterpretq_s32_f32 (dat->uflow_bound));
|
||||
cmp = vorrq_u32 (cmp, uflow);
|
||||
float32x4_t xm = x;
|
||||
/* If any lanes are special, mask them with 0 and retain a copy of x to allow
|
||||
special case handler to fix special lanes later. This is only necessary if
|
||||
fenv exceptions are to be triggered correctly. */
|
||||
if (__glibc_unlikely (v_any_u32 (cmp)))
|
||||
x = v_zerofy_f32 (x, cmp);
|
||||
#endif
|
||||
|
||||
float32x4_t a = vabsq_f32 (x);
|
||||
a = vminq_f32 (a, dat->max);
|
||||
|
||||
/* Lookup erfc(r) and scale(r) in tables, e.g. set erfc(r) to 0 and scale to
|
||||
2/sqrt(pi), when x reduced to r = 0. */
|
||||
float32x4_t shift = dat->shift;
|
||||
float32x4_t z = vaddq_f32 (a, shift);
|
||||
|
||||
/* Clamp index to a range of 644. A naive approach would use a subtract and
|
||||
min. Instead we offset the table address and the index, then use a
|
||||
saturating add. */
|
||||
uint32x4_t i = vqaddq_u32 (vreinterpretq_u32_f32 (z), dat->offset);
|
||||
|
||||
struct entry e = lookup (i);
|
||||
|
||||
/* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */
|
||||
float32x4_t r = vsubq_f32 (z, shift);
|
||||
float32x4_t d = vsubq_f32 (a, r);
|
||||
float32x4_t d2 = vmulq_f32 (d, d);
|
||||
float32x4_t r2 = vmulq_f32 (r, r);
|
||||
|
||||
float32x4_t p1 = r;
|
||||
float32x4_t p2 = vfmsq_laneq_f32 (dat->third, r2, dat->coeffs, 1);
|
||||
float32x4_t p3
|
||||
= vmulq_f32 (r, vfmaq_laneq_f32 (v_f32 (-0.5), r2, dat->coeffs, 0));
|
||||
float32x4_t p4 = vfmaq_laneq_f32 (dat->two_over_five, r2, dat->coeffs, 2);
|
||||
p4 = vfmsq_f32 (dat->tenth, r2, p4);
|
||||
|
||||
float32x4_t y = vfmaq_f32 (p3, d, p4);
|
||||
y = vfmaq_f32 (p2, d, y);
|
||||
y = vfmaq_f32 (p1, d, y);
|
||||
y = vfmsq_f32 (e.erfc, e.scale, vfmsq_f32 (d, d2, y));
|
||||
|
||||
/* Offset equals 2.0f if sign, else 0.0f. */
|
||||
uint32x4_t sign = vshrq_n_u32 (vreinterpretq_u32_f32 (x), 31);
|
||||
float32x4_t off = vreinterpretq_f32_u32 (vshlq_n_u32 (sign, 30));
|
||||
/* Copy sign and scale back in a single fma. Since the bit patterns do not
|
||||
overlap, then logical or and addition are equivalent here. */
|
||||
float32x4_t fac = vreinterpretq_f32_u32 (
|
||||
vsraq_n_u32 (vshlq_n_u32 (sign, 31), dat->table_scale, 1));
|
||||
|
||||
#if WANT_SIMD_EXCEPT
|
||||
if (__glibc_unlikely (v_any_u32 (cmp)))
|
||||
return special_case (xm, vfmaq_f32 (off, fac, y), cmp);
|
||||
#endif
|
||||
|
||||
return vfmaq_f32 (off, fac, y);
|
||||
}
|
||||
libmvec_hidden_def (V_NAME_F1 (erfc))
|
||||
HALF_WIDTH_ALIAS_F1 (erfc)
|
||||
676
sysdeps/aarch64/fpu/erfcf_data.c
Normal file
676
sysdeps/aarch64/fpu/erfcf_data.c
Normal file
@ -0,0 +1,676 @@
|
||||
/* Table for Advanced SIMD erfcf
|
||||
|
||||
Copyright (C) 2024 Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
|
||||
The GNU C Library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
The GNU C Library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, see
|
||||
<https://www.gnu.org/licenses/>. */
|
||||
|
||||
#include "vecmath_config.h"
|
||||
|
||||
/* Lookup table used in erfcf.
|
||||
For each possible rounded input r (multiples of 1/64), between
|
||||
r = 0.0 and r = 10.0625 (645 values):
|
||||
- the first entry __erfcf_data.tab.erfc contains the values of erfc(r),
|
||||
- the second entry __erfcf_data.tab.scale contains the values of
|
||||
2/sqrt(pi)*exp(-r^2). Both values may go into subnormal range, therefore
|
||||
they are scaled by a large enough value 2^47 (fits in 8 bits). */
|
||||
const struct erfcf_data __erfcf_data = {
|
||||
.tab = { { 0x1p47, 0x1.20dd76p47 },
|
||||
{ 0x1.f6f944p46, 0x1.20cb68p47 },
|
||||
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|
||||
{ 0x1.71fdep-53, 0x1.7b4b76p-49 },
|
||||
{ 0x1.1e465ap-53, 0x1.26072ap-49 },
|
||||
{ 0x1.bac92ep-54, 0x1.c7a2ecp-50 },
|
||||
{ 0x1.56441cp-54, 0x1.60dcfp-50 },
|
||||
{ 0x1.08700cp-54, 0x1.112346p-50 },
|
||||
{ 0x1.986a66p-55, 0x1.a6a50ap-51 },
|
||||
{ 0x1.3b3d56p-55, 0x1.46d572p-51 },
|
||||
{ 0x1.e667dap-56, 0x1.f93d0ep-52 },
|
||||
{ 0x1.7712b8p-56, 0x1.86529ep-52 },
|
||||
{ 0x1.211544p-56, 0x1.2d65aep-52 },
|
||||
{ 0x1.bd660ap-57, 0x1.d13c32p-53 },
|
||||
{ 0x1.56f3eep-57, 0x1.66e45ap-53 },
|
||||
{ 0x1.07f14ap-57, 0x1.14b8b6p-53 },
|
||||
{ 0x1.96129cp-58, 0x1.aa854cp-54 },
|
||||
{ 0x1.3837cp-58, 0x1.488b94p-54 },
|
||||
{ 0x1.dfe0c2p-59, 0x1.f9e772p-55 },
|
||||
{ 0x1.709b5ap-59, 0x1.85503p-55 },
|
||||
{ 0x1.1affd2p-59, 0x1.2b7218p-55 },
|
||||
{ 0x1.b2564p-60, 0x1.cc6bb6p-56 },
|
||||
{ 0x1.4d23fap-60, 0x1.61cb1ap-56 },
|
||||
{ 0x1.fecbdp-61, 0x1.0fba0ep-56 },
|
||||
{ 0x1.8767d8p-61, 0x1.a13072p-57 },
|
||||
{ 0x1.2bc67ep-61, 0x1.401abcp-57 },
|
||||
{ 0x1.caf846p-62, 0x1.eafc2cp-58 },
|
||||
{ 0x1.5f2e7ap-62, 0x1.785cp-58 },
|
||||
{ 0x1.0c93acp-62, 0x1.205a7ep-58 },
|
||||
{ 0x1.9a9b06p-63, 0x1.b9a31ap-59 },
|
||||
{ 0x1.39b7fcp-63, 0x1.520968p-59 },
|
||||
{ 0x1.df277ap-64, 0x1.029ce6p-59 },
|
||||
{ 0x1.6dbcdp-64, 0x1.8b81d6p-60 },
|
||||
{ 0x1.17080ap-64, 0x1.2e48f2p-60 },
|
||||
{ 0x1.a98e26p-65, 0x1.cdd86cp-61 },
|
||||
{ 0x1.445a6ap-65, 0x1.60a47ap-61 },
|
||||
{ 0x1.ee324ep-66, 0x1.0d210cp-61 },
|
||||
{ 0x1.784e3p-66, 0x1.9a961ep-62 },
|
||||
{ 0x1.1e65fep-66, 0x1.390b74p-62 },
|
||||
{ 0x1.b3bb86p-67, 0x1.dd1e52p-63 },
|
||||
{ 0x1.4b4e36p-67, 0x1.6b6a7ap-63 },
|
||||
{ 0x1.f790f6p-68, 0x1.14acc2p-63 },
|
||||
{ 0x1.7e82cep-68, 0x1.a511aap-64 },
|
||||
{ 0x1.226a7ap-68, 0x1.404114p-64 },
|
||||
{ 0x1.b8c634p-69, 0x1.e6ea96p-65 },
|
||||
{ 0x1.4e53acp-69, 0x1.71f97ap-65 },
|
||||
{ 0x1.faed5cp-70, 0x1.18fb2ep-65 },
|
||||
{ 0x1.80217ep-70, 0x1.aa947ep-66 },
|
||||
{ 0x1.22f066p-70, 0x1.43a796p-66 },
|
||||
{ 0x1.b87f86p-71, 0x1.eae2fp-67 },
|
||||
{ 0x1.4d4ec8p-71, 0x1.7414e6p-67 },
|
||||
{ 0x1.f8283ep-72, 0x1.19e474p-67 },
|
||||
{ 0x1.7d1b22p-72, 0x1.aaeb7ep-68 },
|
||||
{ 0x1.1ff2dp-72, 0x1.431f66p-68 },
|
||||
{ 0x1.b2e9e8p-73, 0x1.e8e272p-69 },
|
||||
{ 0x1.4848dep-73, 0x1.71a91ep-69 },
|
||||
{ 0x1.ef5b16p-74, 0x1.176014p-69 },
|
||||
{ 0x1.758b92p-74, 0x1.a6137cp-70 },
|
||||
{ 0x1.198d42p-74, 0x1.3ead74p-70 },
|
||||
{ 0x1.a838bp-75, 0x1.e0fbc2p-71 },
|
||||
{ 0x1.3f700cp-75, 0x1.6accaep-71 },
|
||||
{ 0x1.e0d68ep-76, 0x1.118578p-71 },
|
||||
{ 0x1.69b7f4p-76, 0x1.9c3974p-72 },
|
||||
{ 0x1.0ffa12p-76, 0x1.367afap-72 },
|
||||
{ 0x1.98cd1cp-77, 0x1.d377fap-73 },
|
||||
{ 0x1.33148p-77, 0x1.5fbee6p-73 },
|
||||
{ 0x1.cd1dbap-78, 0x1.088a8p-73 },
|
||||
{ 0x1.5a0a9cp-78, 0x1.8db7ccp-74 },
|
||||
{ 0x1.038ef4p-78, 0x1.2ad2ecp-74 },
|
||||
{ 0x1.85308ap-79, 0x1.c0d23ep-75 },
|
||||
{ 0x1.23a3cp-79, 0x1.50e41ap-75 },
|
||||
{ 0x1.b4de68p-80, 0x1.f980a8p-76 },
|
||||
{ 0x1.470ce4p-80, 0x1.7b10fep-76 },
|
||||
{ 0x1.e9700cp-81, 0x1.1c1d98p-76 },
|
||||
{ 0x1.6e0c9p-81, 0x1.a9b08p-77 },
|
||||
{ 0x1.11a25ap-81, 0x1.3ebfb4p-77 },
|
||||
{ 0x1.98e73ap-82, 0x1.dd1d36p-78 },
|
||||
{ 0x1.315f58p-82, 0x1.64e7fp-78 },
|
||||
{ 0x1.c7e35cp-83, 0x1.0ada94p-78 },
|
||||
{ 0x1.542176p-83, 0x1.8ed9e8p-79 },
|
||||
{ 0x1.fb491ep-84, 0x1.29ecb2p-79 },
|
||||
{ 0x1.7a1c34p-84, 0x1.bcdb34p-80 },
|
||||
{ 0x1.19b0f2p-84, 0x1.4bf6cap-80 },
|
||||
{ 0x1.a383cap-85, 0x1.ef3318p-81 },
|
||||
{ 0x1.383bf2p-85, 0x1.712bc2p-81 },
|
||||
{ 0x1.d08cdap-86, 0x1.13151p-81 },
|
||||
{ 0x1.596adp-86, 0x1.99bf36p-82 },
|
||||
{ 0x1.00b602p-86, 0x1.3104d6p-82 },
|
||||
{ 0x1.7d62a2p-87, 0x1.c5e534p-83 },
|
||||
{ 0x1.1b2abcp-87, 0x1.518db2p-83 },
|
||||
{ 0x1.a4480ep-88, 0x1.f5d1c6p-84 },
|
||||
{ 0x1.37be42p-88, 0x1.74d45ap-84 },
|
||||
{ 0x1.ce3ee4p-89, 0x1.14dc4ap-84 },
|
||||
{ 0x1.568986p-89, 0x1.9afd0ep-85 },
|
||||
{ 0x1.fb69c6p-90, 0x1.30e632p-85 },
|
||||
{ 0x1.77a47ep-90, 0x1.c42b48p-86 },
|
||||
{ 0x1.15f4ep-90, 0x1.4f1f52p-86 },
|
||||
{ 0x1.9b25dcp-91, 0x1.f08156p-87 },
|
||||
{ 0x1.2feeeep-91, 0x1.6f9f62p-87 },
|
||||
{ 0x1.c122bcp-92, 0x1.100ffap-87 },
|
||||
{ 0x1.4bb154p-92, 0x1.927ce6p-88 },
|
||||
{ 0x1.e9ae56p-93, 0x1.2992f4p-88 },
|
||||
{ 0x1.6948e8p-93, 0x1.b7cccap-89 },
|
||||
{ 0x1.0a6cd2p-93, 0x1.44d7c4p-89 },
|
||||
{ 0x1.88c0cap-94, 0x1.dfa22p-90 },
|
||||
{ 0x1.215988p-94, 0x1.61eb26p-90 },
|
||||
{ 0x1.aa222ap-95, 0x1.0506e2p-90 },
|
||||
{ 0x1.39a30ep-95, 0x1.80d828p-91 },
|
||||
{ 0x1.cd740ep-96, 0x1.1b8f04p-91 },
|
||||
{ 0x1.534d82p-96, 0x1.a1a7ecp-92 },
|
||||
{ 0x1.f2bb06p-97, 0x1.336f3p-92 },
|
||||
{ 0x1.6e5b34p-97, 0x1.c46172p-93 },
|
||||
{ 0x1.0cfc82p-97, 0x1.4cab82p-93 },
|
||||
{ 0x1.8acc82p-98, 0x1.e9094cp-94 },
|
||||
{ 0x1.219686p-98, 0x1.67465p-94 },
|
||||
{ 0x1.a89fa6p-99, 0x1.07d0b8p-94 },
|
||||
{ 0x1.372982p-99, 0x1.833ffap-95 },
|
||||
{ 0x1.c7d094p-100, 0x1.1c147ap-95 },
|
||||
{ 0x1.4db1c8p-100, 0x1.a096ccp-96 },
|
||||
{ 0x1.e858d8p-101, 0x1.314decp-96 },
|
||||
{ 0x1.6529ep-101, 0x1.bf46cep-97 },
|
||||
{ 0x1.0517bap-101, 0x1.47796ap-97 },
|
||||
{ 0x1.7d8a8p-102, 0x1.df49a2p-98 },
|
||||
{ 0x1.16a46p-102, 0x1.5e9198p-98 },
|
||||
{ 0x1.96ca76p-103, 0x1.004b34p-98 },
|
||||
{ 0x1.28cb2cp-103, 0x1.768f3ep-99 },
|
||||
{ 0x1.b0de98p-104, 0x1.1190d2p-99 },
|
||||
},
|
||||
};
|
||||
113
sysdeps/aarch64/fpu/erfcf_sve.c
Normal file
113
sysdeps/aarch64/fpu/erfcf_sve.c
Normal file
@ -0,0 +1,113 @@
|
||||
/* Single-precision vector (SVE) erfc function
|
||||
|
||||
Copyright (C) 2024 Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
|
||||
The GNU C Library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
The GNU C Library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, see
|
||||
<https://www.gnu.org/licenses/>. */
|
||||
|
||||
#include "sv_math.h"
|
||||
|
||||
static const struct data
|
||||
{
|
||||
uint32_t off_idx, off_arr;
|
||||
float max, shift;
|
||||
float third, two_thirds, two_over_fifteen, two_over_five, tenth;
|
||||
} data = {
|
||||
/* Set an offset so the range of the index used for lookup is 644, and it can
|
||||
be clamped using a saturated add. */
|
||||
.off_idx = 0xb7fffd7b, /* 0xffffffff - asuint(shift) - 644. */
|
||||
.off_arr = 0xfffffd7b, /* 0xffffffff - 644. */
|
||||
.max = 10.0625f, /* 644/64. */
|
||||
.shift = 0x1p17f,
|
||||
.third = 0x1.555556p-2f,
|
||||
.two_thirds = 0x1.555556p-1f,
|
||||
.two_over_fifteen = 0x1.111112p-3f,
|
||||
.two_over_five = -0x1.99999ap-2f,
|
||||
.tenth = -0x1.99999ap-4f,
|
||||
};
|
||||
|
||||
#define SignMask 0x80000000
|
||||
#define TableScale 0x28000000 /* 0x1p-47. */
|
||||
|
||||
/* Optimized single-precision vector erfcf(x).
|
||||
Approximation based on series expansion near x rounded to
|
||||
nearest multiple of 1/64.
|
||||
Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r,
|
||||
|
||||
erfc(x) ~ erfc(r) - scale * d * poly(r, d), with
|
||||
|
||||
poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3
|
||||
+ (2/15 r^4 - 2/5 r^2 + 1/10) d^4
|
||||
|
||||
Values of erfc(r) and scale are read from lookup tables. Stored values
|
||||
are scaled to avoid hitting the subnormal range.
|
||||
|
||||
Note that for x < 0, erfc(x) = 2.0 - erfc(-x).
|
||||
|
||||
Maximum error: 1.63 ULP (~1.0 ULP for x < 0.0).
|
||||
_ZGVsMxv_erfcf(0x1.1dbf7ap+3) got 0x1.f51212p-120
|
||||
want 0x1.f51216p-120. */
|
||||
svfloat32_t SV_NAME_F1 (erfc) (svfloat32_t x, const svbool_t pg)
|
||||
{
|
||||
const struct data *dat = ptr_barrier (&data);
|
||||
|
||||
svfloat32_t a = svabs_x (pg, x);
|
||||
|
||||
/* Clamp input at |x| <= 10.0 + 4/64. */
|
||||
a = svmin_x (pg, a, dat->max);
|
||||
|
||||
/* Reduce x to the nearest multiple of 1/64. */
|
||||
svfloat32_t shift = sv_f32 (dat->shift);
|
||||
svfloat32_t z = svadd_x (pg, a, shift);
|
||||
|
||||
/* Saturate index for the NaN case. */
|
||||
svuint32_t i = svqadd (svreinterpret_u32 (z), dat->off_idx);
|
||||
|
||||
/* Lookup erfc(r) and 2/sqrt(pi)*exp(-r^2) in tables. */
|
||||
i = svmul_x (pg, i, 2);
|
||||
const float32_t *p = &__erfcf_data.tab[0].erfc - 2 * dat->off_arr;
|
||||
svfloat32_t erfcr = svld1_gather_index (pg, p, i);
|
||||
svfloat32_t scale = svld1_gather_index (pg, p + 1, i);
|
||||
|
||||
/* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */
|
||||
svfloat32_t r = svsub_x (pg, z, shift);
|
||||
svfloat32_t d = svsub_x (pg, a, r);
|
||||
svfloat32_t d2 = svmul_x (pg, d, d);
|
||||
svfloat32_t r2 = svmul_x (pg, r, r);
|
||||
|
||||
svfloat32_t coeffs = svld1rq (svptrue_b32 (), &dat->third);
|
||||
svfloat32_t third = svdup_lane (coeffs, 0);
|
||||
|
||||
svfloat32_t p1 = r;
|
||||
svfloat32_t p2 = svmls_lane (third, r2, coeffs, 1);
|
||||
svfloat32_t p3 = svmul_x (pg, r, svmla_lane (sv_f32 (-0.5), r2, coeffs, 0));
|
||||
svfloat32_t p4 = svmla_lane (sv_f32 (dat->two_over_five), r2, coeffs, 2);
|
||||
p4 = svmls_x (pg, sv_f32 (dat->tenth), r2, p4);
|
||||
|
||||
svfloat32_t y = svmla_x (pg, p3, d, p4);
|
||||
y = svmla_x (pg, p2, d, y);
|
||||
y = svmla_x (pg, p1, d, y);
|
||||
|
||||
/* Solves the |x| = inf/nan case. */
|
||||
y = svmls_x (pg, erfcr, scale, svmls_x (pg, d, d2, y));
|
||||
|
||||
/* Offset equals 2.0f if sign, else 0.0f. */
|
||||
svuint32_t sign = svand_x (pg, svreinterpret_u32 (x), SignMask);
|
||||
svfloat32_t off = svreinterpret_f32 (svlsr_x (pg, sign, 1));
|
||||
/* Handle sign and scale back in a single fma. */
|
||||
svfloat32_t fac = svreinterpret_f32 (svorr_x (pg, sign, TableScale));
|
||||
|
||||
return svmla_x (pg, off, fac, y);
|
||||
}
|
||||
@ -33,6 +33,7 @@ VPCS_VECTOR_WRAPPER_ff (atan2_advsimd, _ZGVnN2vv_atan2)
|
||||
VPCS_VECTOR_WRAPPER (cos_advsimd, _ZGVnN2v_cos)
|
||||
VPCS_VECTOR_WRAPPER (cosh_advsimd, _ZGVnN2v_cosh)
|
||||
VPCS_VECTOR_WRAPPER (erf_advsimd, _ZGVnN2v_erf)
|
||||
VPCS_VECTOR_WRAPPER (erfc_advsimd, _ZGVnN2v_erfc)
|
||||
VPCS_VECTOR_WRAPPER (exp_advsimd, _ZGVnN2v_exp)
|
||||
VPCS_VECTOR_WRAPPER (exp10_advsimd, _ZGVnN2v_exp10)
|
||||
VPCS_VECTOR_WRAPPER (exp2_advsimd, _ZGVnN2v_exp2)
|
||||
|
||||
@ -52,6 +52,7 @@ SVE_VECTOR_WRAPPER_ff (atan2_sve, _ZGVsMxvv_atan2)
|
||||
SVE_VECTOR_WRAPPER (cos_sve, _ZGVsMxv_cos)
|
||||
SVE_VECTOR_WRAPPER (cosh_sve, _ZGVsMxv_cosh)
|
||||
SVE_VECTOR_WRAPPER (erf_sve, _ZGVsMxv_erf)
|
||||
SVE_VECTOR_WRAPPER (erfc_sve, _ZGVsMxv_erfc)
|
||||
SVE_VECTOR_WRAPPER (exp_sve, _ZGVsMxv_exp)
|
||||
SVE_VECTOR_WRAPPER (exp10_sve, _ZGVsMxv_exp10)
|
||||
SVE_VECTOR_WRAPPER (exp2_sve, _ZGVsMxv_exp2)
|
||||
|
||||
@ -33,6 +33,7 @@ VPCS_VECTOR_WRAPPER_ff (atan2f_advsimd, _ZGVnN4vv_atan2f)
|
||||
VPCS_VECTOR_WRAPPER (cosf_advsimd, _ZGVnN4v_cosf)
|
||||
VPCS_VECTOR_WRAPPER (coshf_advsimd, _ZGVnN4v_coshf)
|
||||
VPCS_VECTOR_WRAPPER (erff_advsimd, _ZGVnN4v_erff)
|
||||
VPCS_VECTOR_WRAPPER (erfcf_advsimd, _ZGVnN4v_erfcf)
|
||||
VPCS_VECTOR_WRAPPER (expf_advsimd, _ZGVnN4v_expf)
|
||||
VPCS_VECTOR_WRAPPER (exp10f_advsimd, _ZGVnN4v_exp10f)
|
||||
VPCS_VECTOR_WRAPPER (exp2f_advsimd, _ZGVnN4v_exp2f)
|
||||
|
||||
@ -52,6 +52,7 @@ SVE_VECTOR_WRAPPER_ff (atan2f_sve, _ZGVsMxvv_atan2f)
|
||||
SVE_VECTOR_WRAPPER (cosf_sve, _ZGVsMxv_cosf)
|
||||
SVE_VECTOR_WRAPPER (coshf_sve, _ZGVsMxv_coshf)
|
||||
SVE_VECTOR_WRAPPER (erff_sve, _ZGVsMxv_erff)
|
||||
SVE_VECTOR_WRAPPER (erfcf_sve, _ZGVsMxv_erfcf)
|
||||
SVE_VECTOR_WRAPPER (expf_sve, _ZGVsMxv_expf)
|
||||
SVE_VECTOR_WRAPPER (exp10f_sve, _ZGVsMxv_exp10f)
|
||||
SVE_VECTOR_WRAPPER (exp2f_sve, _ZGVsMxv_exp2f)
|
||||
|
||||
@ -114,4 +114,20 @@ extern const struct sv_erf_data
|
||||
double scale[769];
|
||||
} __sv_erf_data attribute_hidden;
|
||||
|
||||
extern const struct erfc_data
|
||||
{
|
||||
struct
|
||||
{
|
||||
double erfc, scale;
|
||||
} tab[3488];
|
||||
} __erfc_data attribute_hidden;
|
||||
|
||||
extern const struct erfcf_data
|
||||
{
|
||||
struct
|
||||
{
|
||||
float erfc, scale;
|
||||
} tab[645];
|
||||
} __erfcf_data attribute_hidden;
|
||||
|
||||
#endif
|
||||
|
||||
@ -1017,11 +1017,19 @@ double: 2
|
||||
float: 2
|
||||
ldouble: 4
|
||||
|
||||
Function: "erfc_advsimd":
|
||||
double: 1
|
||||
float: 1
|
||||
|
||||
Function: "erfc_downward":
|
||||
double: 4
|
||||
float: 4
|
||||
ldouble: 5
|
||||
|
||||
Function: "erfc_sve":
|
||||
double: 1
|
||||
float: 1
|
||||
|
||||
Function: "erfc_towardzero":
|
||||
double: 3
|
||||
float: 3
|
||||
|
||||
@ -82,6 +82,8 @@ GLIBC_2.40 _ZGVnN2v_atanhf F
|
||||
GLIBC_2.40 _ZGVnN2v_cosh F
|
||||
GLIBC_2.40 _ZGVnN2v_coshf F
|
||||
GLIBC_2.40 _ZGVnN2v_erf F
|
||||
GLIBC_2.40 _ZGVnN2v_erfc F
|
||||
GLIBC_2.40 _ZGVnN2v_erfcf F
|
||||
GLIBC_2.40 _ZGVnN2v_erff F
|
||||
GLIBC_2.40 _ZGVnN2v_sinh F
|
||||
GLIBC_2.40 _ZGVnN2v_sinhf F
|
||||
@ -91,6 +93,7 @@ GLIBC_2.40 _ZGVnN4v_acoshf F
|
||||
GLIBC_2.40 _ZGVnN4v_asinhf F
|
||||
GLIBC_2.40 _ZGVnN4v_atanhf F
|
||||
GLIBC_2.40 _ZGVnN4v_coshf F
|
||||
GLIBC_2.40 _ZGVnN4v_erfcf F
|
||||
GLIBC_2.40 _ZGVnN4v_erff F
|
||||
GLIBC_2.40 _ZGVnN4v_sinhf F
|
||||
GLIBC_2.40 _ZGVnN4v_tanhf F
|
||||
@ -103,6 +106,8 @@ GLIBC_2.40 _ZGVsMxv_atanhf F
|
||||
GLIBC_2.40 _ZGVsMxv_cosh F
|
||||
GLIBC_2.40 _ZGVsMxv_coshf F
|
||||
GLIBC_2.40 _ZGVsMxv_erf F
|
||||
GLIBC_2.40 _ZGVsMxv_erfc F
|
||||
GLIBC_2.40 _ZGVsMxv_erfcf F
|
||||
GLIBC_2.40 _ZGVsMxv_erff F
|
||||
GLIBC_2.40 _ZGVsMxv_sinh F
|
||||
GLIBC_2.40 _ZGVsMxv_sinhf F
|
||||
|
||||
Loading…
Reference in New Issue
Block a user