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x86_64: Fix svml_d_exp28_core_avx512.S code formatting
This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
This commit is contained in:
parent
2b7494c4f8
commit
91a317cc97
@ -52,250 +52,249 @@
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/* Offsets for data table __svml_dexp2_data_internal_avx512
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*/
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#define Frac_PowerD0 0
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#define poly_coeff1 128
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#define poly_coeff2 192
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#define poly_coeff3 256
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#define poly_coeff4 320
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#define poly_coeff5 384
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#define poly_coeff6 448
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#define add_const 512
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#define AbsMask 576
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#define Threshold 640
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#define _lIndexMask 704
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#define Frac_PowerD0 0
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#define poly_coeff1 128
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#define poly_coeff2 192
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#define poly_coeff3 256
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#define poly_coeff4 320
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#define poly_coeff5 384
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#define poly_coeff6 448
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#define add_const 512
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#define AbsMask 576
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#define Threshold 640
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#define _lIndexMask 704
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#include <sysdep.h>
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.text
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.section .text.evex512,"ax",@progbits
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.section .text.evex512, "ax", @progbits
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ENTRY(_ZGVeN8v_exp2_skx)
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pushq %rbp
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cfi_def_cfa_offset(16)
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movq %rsp, %rbp
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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andq $-64, %rsp
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subq $192, %rsp
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vmovups poly_coeff5+__svml_dexp2_data_internal_avx512(%rip), %zmm14
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vmovups poly_coeff6+__svml_dexp2_data_internal_avx512(%rip), %zmm6
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pushq %rbp
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cfi_def_cfa_offset(16)
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movq %rsp, %rbp
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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andq $-64, %rsp
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subq $192, %rsp
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vmovups poly_coeff5+__svml_dexp2_data_internal_avx512(%rip), %zmm14
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vmovups poly_coeff6+__svml_dexp2_data_internal_avx512(%rip), %zmm6
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/*
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* Reduced argument
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* where VREDUCE is available
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*/
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vreducepd $65, {sae}, %zmm0, %zmm10
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vmovups poly_coeff4+__svml_dexp2_data_internal_avx512(%rip), %zmm7
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vmovups add_const+__svml_dexp2_data_internal_avx512(%rip), %zmm3
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vmovups poly_coeff3+__svml_dexp2_data_internal_avx512(%rip), %zmm8
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vmovups __svml_dexp2_data_internal_avx512(%rip), %zmm13
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/*
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* Reduced argument
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* where VREDUCE is available
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*/
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vreducepd $65, {sae}, %zmm0, %zmm10
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vmovups poly_coeff4+__svml_dexp2_data_internal_avx512(%rip), %zmm7
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vmovups add_const+__svml_dexp2_data_internal_avx512(%rip), %zmm3
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vmovups poly_coeff3+__svml_dexp2_data_internal_avx512(%rip), %zmm8
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vmovups __svml_dexp2_data_internal_avx512(%rip), %zmm13
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/* c6*r + c5 */
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vfmadd231pd {rn-sae}, %zmm10, %zmm6, %zmm14
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vmovups poly_coeff2+__svml_dexp2_data_internal_avx512(%rip), %zmm9
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vmovups Threshold+__svml_dexp2_data_internal_avx512(%rip), %zmm2
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/* c6*r + c5 */
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vfmadd231pd {rn-sae}, %zmm10, %zmm6, %zmm14
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vmovups poly_coeff2+__svml_dexp2_data_internal_avx512(%rip), %zmm9
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vmovups Threshold+__svml_dexp2_data_internal_avx512(%rip), %zmm2
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/*
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*
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* HA
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* Variables and constants
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* Load constants and vector(s)
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*/
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vmovups poly_coeff1+__svml_dexp2_data_internal_avx512(%rip), %zmm11
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/*
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*
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* HA
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* Variables and constants
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* Load constants and vector(s)
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*/
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vmovups poly_coeff1+__svml_dexp2_data_internal_avx512(%rip), %zmm11
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/* c6*r^2 + c5*r + c4 */
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vfmadd213pd {rn-sae}, %zmm7, %zmm10, %zmm14
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/* c6*r^2 + c5*r + c4 */
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vfmadd213pd {rn-sae}, %zmm7, %zmm10, %zmm14
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/*
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* Integer form of K+0.b1b2b3b4 in lower bits - call K_plus_f0
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* Mantisssa of normalized double precision FP: 1.b1b2...b52
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*/
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vaddpd {rd-sae}, %zmm3, %zmm0, %zmm4
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vandpd AbsMask+__svml_dexp2_data_internal_avx512(%rip), %zmm0, %zmm1
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/*
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* Integer form of K+0.b1b2b3b4 in lower bits - call K_plus_f0
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* Mantisssa of normalized double precision FP: 1.b1b2...b52
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*/
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vaddpd {rd-sae}, %zmm3, %zmm0, %zmm4
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vandpd AbsMask+__svml_dexp2_data_internal_avx512(%rip), %zmm0, %zmm1
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/* c6*r^3 + c5*r^2 + c4*r + c3 */
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vfmadd213pd {rn-sae}, %zmm8, %zmm10, %zmm14
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vcmppd $29, {sae}, %zmm2, %zmm1, %k0
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/* c6*r^3 + c5*r^2 + c4*r + c3 */
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vfmadd213pd {rn-sae}, %zmm8, %zmm10, %zmm14
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vcmppd $29, {sae}, %zmm2, %zmm1, %k0
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/* c6*r^4 + c5*r^3 + c4*r^2 + c3*r + c2 */
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vfmadd213pd {rn-sae}, %zmm9, %zmm10, %zmm14
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kmovw %k0, %edx
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/* c6*r^4 + c5*r^3 + c4*r^2 + c3*r + c2 */
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vfmadd213pd {rn-sae}, %zmm9, %zmm10, %zmm14
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kmovw %k0, %edx
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/* c6*r^5 + c5*r^4 + c4*r^3 + c3*r^2 + c2*r + c1 */
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vfmadd213pd {rn-sae}, %zmm11, %zmm10, %zmm14
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/* c6*r^5 + c5*r^4 + c4*r^3 + c3*r^2 + c2*r + c1 */
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vfmadd213pd {rn-sae}, %zmm11, %zmm10, %zmm14
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/* Table value: 2^(0.b1b2b3b4) */
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vpandq _lIndexMask+__svml_dexp2_data_internal_avx512(%rip), %zmm4, %zmm5
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vpermt2pd Frac_PowerD0+64+__svml_dexp2_data_internal_avx512(%rip), %zmm5, %zmm13
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/* Table value: 2^(0.b1b2b3b4) */
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vpandq _lIndexMask+__svml_dexp2_data_internal_avx512(%rip), %zmm4, %zmm5
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vpermt2pd Frac_PowerD0+64+__svml_dexp2_data_internal_avx512(%rip), %zmm5, %zmm13
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/* T*r */
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vmulpd {rn-sae}, %zmm10, %zmm13, %zmm12
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/* T*r */
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vmulpd {rn-sae}, %zmm10, %zmm13, %zmm12
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/* T + (T*r*(c6*r^5 + c5*r^4 + c4*r^3 + c3*r^2 + c2*r + c1)) */
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vfmadd213pd {rn-sae}, %zmm13, %zmm12, %zmm14
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/* T + (T*r*(c6*r^5 + c5*r^4 + c4*r^3 + c3*r^2 + c2*r + c1)) */
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vfmadd213pd {rn-sae}, %zmm13, %zmm12, %zmm14
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/* Scaling placed at the end to avoid accuracy loss when T*r*scale underflows */
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vscalefpd {rn-sae}, %zmm0, %zmm14, %zmm1
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testl %edx, %edx
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/* Scaling placed at the end to avoid accuracy loss when T*r*scale underflows */
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vscalefpd {rn-sae}, %zmm0, %zmm14, %zmm1
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testl %edx, %edx
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/* Go to special inputs processing branch */
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jne L(SPECIAL_VALUES_BRANCH)
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# LOE rbx r12 r13 r14 r15 edx zmm0 zmm1
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/* Go to special inputs processing branch */
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jne L(SPECIAL_VALUES_BRANCH)
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# LOE rbx r12 r13 r14 r15 edx zmm0 zmm1
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/* Restore registers
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* and exit the function
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*/
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/* Restore registers
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* and exit the function
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*/
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L(EXIT):
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vmovaps %zmm1, %zmm0
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movq %rbp, %rsp
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popq %rbp
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cfi_def_cfa(7, 8)
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cfi_restore(6)
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ret
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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vmovaps %zmm1, %zmm0
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movq %rbp, %rsp
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popq %rbp
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cfi_def_cfa(7, 8)
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cfi_restore(6)
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ret
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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/* Branch to process
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* special inputs
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*/
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/* Branch to process
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* special inputs
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*/
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L(SPECIAL_VALUES_BRANCH):
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vmovups %zmm0, 64(%rsp)
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vmovups %zmm1, 128(%rsp)
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# LOE rbx r12 r13 r14 r15 edx zmm1
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vmovups %zmm0, 64(%rsp)
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vmovups %zmm1, 128(%rsp)
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# LOE rbx r12 r13 r14 r15 edx zmm1
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xorl %eax, %eax
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# LOE rbx r12 r13 r14 r15 eax edx
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xorl %eax, %eax
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# LOE rbx r12 r13 r14 r15 eax edx
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vzeroupper
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movq %r12, 16(%rsp)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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movl %eax, %r12d
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movq %r13, 8(%rsp)
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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movl %edx, %r13d
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movq %r14, (%rsp)
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r15 r12d r13d
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vzeroupper
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movq %r12, 16(%rsp)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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movl %eax, %r12d
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movq %r13, 8(%rsp)
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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movl %edx, %r13d
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movq %r14, (%rsp)
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r15 r12d r13d
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/* Range mask
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* bits check
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*/
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/* Range mask
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* bits check
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*/
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L(RANGEMASK_CHECK):
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btl %r12d, %r13d
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btl %r12d, %r13d
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/* Call scalar math function */
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jc L(SCALAR_MATH_CALL)
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# LOE rbx r15 r12d r13d
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/* Call scalar math function */
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jc L(SCALAR_MATH_CALL)
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# LOE rbx r15 r12d r13d
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/* Special inputs
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* processing loop
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*/
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/* Special inputs
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* processing loop
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*/
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L(SPECIAL_VALUES_LOOP):
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incl %r12d
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cmpl $8, %r12d
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incl %r12d
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cmpl $8, %r12d
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/* Check bits in range mask */
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jl L(RANGEMASK_CHECK)
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# LOE rbx r15 r12d r13d
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/* Check bits in range mask */
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jl L(RANGEMASK_CHECK)
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# LOE rbx r15 r12d r13d
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movq 16(%rsp), %r12
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cfi_restore(12)
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movq 8(%rsp), %r13
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cfi_restore(13)
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movq (%rsp), %r14
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cfi_restore(14)
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vmovups 128(%rsp), %zmm1
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movq 16(%rsp), %r12
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cfi_restore(12)
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movq 8(%rsp), %r13
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cfi_restore(13)
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movq (%rsp), %r14
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cfi_restore(14)
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vmovups 128(%rsp), %zmm1
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/* Go to exit */
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jmp L(EXIT)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r12 r13 r14 r15 zmm1
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/* Go to exit */
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jmp L(EXIT)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r12 r13 r14 r15 zmm1
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/* Scalar math fucntion call
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* to process special input
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*/
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/* Scalar math fucntion call
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* to process special input
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*/
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L(SCALAR_MATH_CALL):
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movl %r12d, %r14d
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movsd 64(%rsp,%r14,8), %xmm0
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call exp2@PLT
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# LOE rbx r14 r15 r12d r13d xmm0
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movl %r12d, %r14d
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movsd 64(%rsp, %r14, 8), %xmm0
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call exp2@PLT
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# LOE rbx r14 r15 r12d r13d xmm0
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movsd %xmm0, 128(%rsp,%r14,8)
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movsd %xmm0, 128(%rsp, %r14, 8)
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/* Process special inputs in loop */
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jmp L(SPECIAL_VALUES_LOOP)
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# LOE rbx r15 r12d r13d
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/* Process special inputs in loop */
|
||||
jmp L(SPECIAL_VALUES_LOOP)
|
||||
# LOE rbx r15 r12d r13d
|
||||
END(_ZGVeN8v_exp2_skx)
|
||||
|
||||
.section .rodata, "a"
|
||||
.align 64
|
||||
.section .rodata, "a"
|
||||
.align 64
|
||||
|
||||
#ifdef __svml_dexp2_data_internal_avx512_typedef
|
||||
typedef unsigned int VUINT32;
|
||||
typedef struct {
|
||||
__declspec(align(64)) VUINT32 Frac_PowerD0[16][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff1[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff2[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff3[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff4[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff5[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff6[8][2];
|
||||
__declspec(align(64)) VUINT32 add_const[8][2];
|
||||
__declspec(align(64)) VUINT32 AbsMask[8][2];
|
||||
__declspec(align(64)) VUINT32 Threshold[8][2];
|
||||
__declspec(align(64)) VUINT32 _lIndexMask[8][2];
|
||||
__declspec(align(64)) VUINT32 Frac_PowerD0[16][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff1[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff2[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff3[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff4[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff5[8][2];
|
||||
__declspec(align(64)) VUINT32 poly_coeff6[8][2];
|
||||
__declspec(align(64)) VUINT32 add_const[8][2];
|
||||
__declspec(align(64)) VUINT32 AbsMask[8][2];
|
||||
__declspec(align(64)) VUINT32 Threshold[8][2];
|
||||
__declspec(align(64)) VUINT32 _lIndexMask[8][2];
|
||||
} __svml_dexp2_data_internal_avx512;
|
||||
#endif
|
||||
__svml_dexp2_data_internal_avx512:
|
||||
/*== Frac_PowerD0 ==*/
|
||||
.quad 0x3FF0000000000000
|
||||
.quad 0x3FF0B5586CF9890F
|
||||
.quad 0x3FF172B83C7D517B
|
||||
.quad 0x3FF2387A6E756238
|
||||
.quad 0x3FF306FE0A31B715
|
||||
.quad 0x3FF3DEA64C123422
|
||||
.quad 0x3FF4BFDAD5362A27
|
||||
.quad 0x3FF5AB07DD485429
|
||||
.quad 0x3FF6A09E667F3BCD
|
||||
.quad 0x3FF7A11473EB0187
|
||||
.quad 0x3FF8ACE5422AA0DB
|
||||
.quad 0x3FF9C49182A3F090
|
||||
.quad 0x3FFAE89F995AD3AD
|
||||
.quad 0x3FFC199BDD85529C
|
||||
.quad 0x3FFD5818DCFBA487
|
||||
.quad 0x3FFEA4AFA2A490DA
|
||||
.align 64
|
||||
.quad 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B /*== poly_coeff1 ==*/
|
||||
.align 64
|
||||
.quad 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A /*== poly_coeff2 ==*/
|
||||
.align 64
|
||||
.quad 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9 /*== poly_coeff3 ==*/
|
||||
.align 64
|
||||
.quad 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252 /*== poly_coeff4 ==*/
|
||||
.align 64
|
||||
.quad 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19 /*== poly_coeff5 ==*/
|
||||
.align 64
|
||||
.quad 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B /*== poly_coeff6 ==*/
|
||||
.align 64
|
||||
.quad 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000 /* add_const */
|
||||
.align 64
|
||||
.quad 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff /* AbsMask */
|
||||
.align 64
|
||||
.quad 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000 /* Threshold */
|
||||
.align 64
|
||||
.quad 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F /* _lIndexMask */
|
||||
.align 64
|
||||
.type __svml_dexp2_data_internal_avx512,@object
|
||||
.size __svml_dexp2_data_internal_avx512,.-__svml_dexp2_data_internal_avx512
|
||||
/* Frac_PowerD0 */
|
||||
.quad 0x3FF0000000000000
|
||||
.quad 0x3FF0B5586CF9890F
|
||||
.quad 0x3FF172B83C7D517B
|
||||
.quad 0x3FF2387A6E756238
|
||||
.quad 0x3FF306FE0A31B715
|
||||
.quad 0x3FF3DEA64C123422
|
||||
.quad 0x3FF4BFDAD5362A27
|
||||
.quad 0x3FF5AB07DD485429
|
||||
.quad 0x3FF6A09E667F3BCD
|
||||
.quad 0x3FF7A11473EB0187
|
||||
.quad 0x3FF8ACE5422AA0DB
|
||||
.quad 0x3FF9C49182A3F090
|
||||
.quad 0x3FFAE89F995AD3AD
|
||||
.quad 0x3FFC199BDD85529C
|
||||
.quad 0x3FFD5818DCFBA487
|
||||
.quad 0x3FFEA4AFA2A490DA
|
||||
.align 64
|
||||
.quad 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B, 0x3FE62E42FEFA398B /* == poly_coeff1 == */
|
||||
.align 64
|
||||
.quad 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A, 0x3FCEBFBDFF84555A /* == poly_coeff2 == */
|
||||
.align 64
|
||||
.quad 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9, 0x3FAC6B08D4AD86B9 /* == poly_coeff3 == */
|
||||
.align 64
|
||||
.quad 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252, 0x3F83B2AD1B172252 /* == poly_coeff4 == */
|
||||
.align 64
|
||||
.quad 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19, 0x3F55D7472713CD19 /* == poly_coeff5 == */
|
||||
.align 64
|
||||
.quad 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B, 0x3F24A1D7F526371B /* == poly_coeff6 == */
|
||||
.align 64
|
||||
.quad 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000, 0x42F8000000000000 /* add_const */
|
||||
.align 64
|
||||
.quad 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff /* AbsMask */
|
||||
.align 64
|
||||
.quad 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000, 0x408fefff00000000 /* Threshold */
|
||||
.align 64
|
||||
.quad 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F, 0x000000000000000F /* _lIndexMask */
|
||||
.align 64
|
||||
.type __svml_dexp2_data_internal_avx512, @object
|
||||
.size __svml_dexp2_data_internal_avx512, .-__svml_dexp2_data_internal_avx512
|
||||
|
Loading…
Reference in New Issue
Block a user