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x86_64: Fix svml_d_log28_core_avx512.S code formatting

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This commit contains following formatting changes

1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
   between it and the first operand.
3. Instruction greater than 7 characters in length have a
   space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
8. 1 space between line content and line comment.
9. Space after all commas.

Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
This commit is contained in:
Sunil K Pandey 2022-03-07 10:47:14 -08:00
parent 26b648892a
commit 993be2001c
1 changed files with 213 additions and 214 deletions
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81
sysdeps/x86_64/fpu/multiarch/svml_d_log28_core_avx512.S
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@ -44,8 +44,7 @@
#include <sysdep.h> #include <sysdep.h>
.text .section .text.evex512, "ax", @progbits
.section .text.evex512,"ax",@progbits
ENTRY(_ZGVeN8v_log2_skx) ENTRY(_ZGVeN8v_log2_skx)
pushq %rbp pushq %rbp
cfi_def_cfa_offset(16) cfi_def_cfa_offset(16)
@ -60,33 +59,33 @@ ENTRY(_ZGVeN8v_log2_skx)
vmovups poly_coeff5+__svml_dlog2_data_internal_avx512(%rip), %zmm12 vmovups poly_coeff5+__svml_dlog2_data_internal_avx512(%rip), %zmm12
vmovups poly_coeff3+__svml_dlog2_data_internal_avx512(%rip), %zmm13 vmovups poly_coeff3+__svml_dlog2_data_internal_avx512(%rip), %zmm13
/* Start polynomial evaluation */ /* Start polynomial evaluation */
vmovups poly_coeff9+__svml_dlog2_data_internal_avx512(%rip), %zmm10 vmovups poly_coeff9+__svml_dlog2_data_internal_avx512(%rip), %zmm10
vmovups poly_coeff8+__svml_dlog2_data_internal_avx512(%rip), %zmm0 vmovups poly_coeff8+__svml_dlog2_data_internal_avx512(%rip), %zmm0
vmovups poly_coeff7+__svml_dlog2_data_internal_avx512(%rip), %zmm11 vmovups poly_coeff7+__svml_dlog2_data_internal_avx512(%rip), %zmm11
vmovups poly_coeff6+__svml_dlog2_data_internal_avx512(%rip), %zmm14 vmovups poly_coeff6+__svml_dlog2_data_internal_avx512(%rip), %zmm14
/* Prepare exponent correction: DblRcp<0.75? */ /* Prepare exponent correction: DblRcp<0.75? */
vmovups C075+__svml_dlog2_data_internal_avx512(%rip), %zmm1 vmovups C075+__svml_dlog2_data_internal_avx512(%rip), %zmm1
/* Table lookup */ /* Table lookup */
vmovups __svml_dlog2_data_internal_avx512(%rip), %zmm4 vmovups __svml_dlog2_data_internal_avx512(%rip), %zmm4
/* GetExp(x) */ /* GetExp(x) */
vgetexppd {sae}, %zmm7, %zmm5 vgetexppd {sae}, %zmm7, %zmm5
/* DblRcp ~ 1/Mantissa */ /* DblRcp ~ 1/Mantissa */
vrcp14pd %zmm6, %zmm8 vrcp14pd %zmm6, %zmm8
/* x<=0? */ /* x<=0? */
vfpclasspd $94, %zmm7, %k0 vfpclasspd $94, %zmm7, %k0
/* round DblRcp to 4 fractional bits (RN mode, no Precision exception) */ /* round DblRcp to 4 fractional bits (RN mode, no Precision exception) */
vrndscalepd $88, {sae}, %zmm8, %zmm3 vrndscalepd $88, {sae}, %zmm8, %zmm3
vmovups poly_coeff4+__svml_dlog2_data_internal_avx512(%rip), %zmm8 vmovups poly_coeff4+__svml_dlog2_data_internal_avx512(%rip), %zmm8
kmovw %k0, %edx kmovw %k0, %edx
/* Reduced argument: R = DblRcp*Mantissa - 1 */ /* Reduced argument: R = DblRcp*Mantissa - 1 */
vfmsub213pd {rn-sae}, %zmm2, %zmm3, %zmm6 vfmsub213pd {rn-sae}, %zmm2, %zmm3, %zmm6
vcmppd $17, {sae}, %zmm1, %zmm3, %k1 vcmppd $17, {sae}, %zmm1, %zmm3, %k1
vfmadd231pd {rn-sae}, %zmm6, %zmm12, %zmm8 vfmadd231pd {rn-sae}, %zmm6, %zmm12, %zmm8
@ -95,32 +94,32 @@ ENTRY(_ZGVeN8v_log2_skx)
vfmadd231pd {rn-sae}, %zmm6, %zmm11, %zmm14 vfmadd231pd {rn-sae}, %zmm6, %zmm11, %zmm14
vmovups poly_coeff1+__svml_dlog2_data_internal_avx512(%rip), %zmm1 vmovups poly_coeff1+__svml_dlog2_data_internal_avx512(%rip), %zmm1
/* R^2 */ /* R^2 */
vmulpd {rn-sae}, %zmm6, %zmm6, %zmm15 vmulpd {rn-sae}, %zmm6, %zmm6, %zmm15
vfmadd231pd {rn-sae}, %zmm6, %zmm13, %zmm12 vfmadd231pd {rn-sae}, %zmm6, %zmm13, %zmm12
/* Prepare table index */ /* Prepare table index */
vpsrlq $48, %zmm3, %zmm9 vpsrlq $48, %zmm3, %zmm9
/* add 1 to Expon if DblRcp<0.75 */ /* add 1 to Expon if DblRcp<0.75 */
vaddpd {rn-sae}, %zmm2, %zmm5, %zmm5{%k1} vaddpd {rn-sae}, %zmm2, %zmm5, %zmm5{%k1}
vmulpd {rn-sae}, %zmm15, %zmm15, %zmm13 vmulpd {rn-sae}, %zmm15, %zmm15, %zmm13
vfmadd213pd {rn-sae}, %zmm14, %zmm15, %zmm0 vfmadd213pd {rn-sae}, %zmm14, %zmm15, %zmm0
vfmadd213pd {rn-sae}, %zmm12, %zmm15, %zmm8 vfmadd213pd {rn-sae}, %zmm12, %zmm15, %zmm8
vpermt2pd Log_tbl+64+__svml_dlog2_data_internal_avx512(%rip), %zmm9, %zmm4 vpermt2pd Log_tbl+64+__svml_dlog2_data_internal_avx512(%rip), %zmm9, %zmm4
/* polynomial */ /* polynomial */
vfmadd213pd {rn-sae}, %zmm8, %zmm13, %zmm0 vfmadd213pd {rn-sae}, %zmm8, %zmm13, %zmm0
vfmadd213pd {rn-sae}, %zmm1, %zmm6, %zmm0 vfmadd213pd {rn-sae}, %zmm1, %zmm6, %zmm0
vfmadd213pd {rn-sae}, %zmm4, %zmm0, %zmm6 vfmadd213pd {rn-sae}, %zmm4, %zmm0, %zmm6
vaddpd {rn-sae}, %zmm6, %zmm5, %zmm0 vaddpd {rn-sae}, %zmm6, %zmm5, %zmm0
testl %edx, %edx testl %edx, %edx
/* Go to special inputs processing branch */ /* Go to special inputs processing branch */
jne L(SPECIAL_VALUES_BRANCH) jne L(SPECIAL_VALUES_BRANCH)
# LOE rbx r12 r13 r14 r15 edx zmm0 zmm7 # LOE rbx r12 r13 r14 r15 edx zmm0 zmm7
/* Restore registers /* Restore registers
* and exit the function * and exit the function
*/ */
@ -133,7 +132,7 @@ L(EXIT):
cfi_def_cfa(6, 16) cfi_def_cfa(6, 16)
cfi_offset(6, -16) cfi_offset(6, -16)
/* Branch to process /* Branch to process
* special inputs * special inputs
*/ */
@ -159,18 +158,18 @@ L(SPECIAL_VALUES_BRANCH):
.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
# LOE rbx r15 r12d r13d # LOE rbx r15 r12d r13d
/* Range mask /* Range mask
* bits check * bits check
*/ */
L(RANGEMASK_CHECK): L(RANGEMASK_CHECK):
btl %r12d, %r13d btl %r12d, %r13d
/* Call scalar math function */ /* Call scalar math function */
jc L(SCALAR_MATH_CALL) jc L(SCALAR_MATH_CALL)
# LOE rbx r15 r12d r13d # LOE rbx r15 r12d r13d
/* Special inputs /* Special inputs
* processing loop * processing loop
*/ */
@ -178,7 +177,7 @@ L(SPECIAL_VALUES_LOOP):
incl %r12d incl %r12d
cmpl $8, %r12d cmpl $8, %r12d
/* Check bits in range mask */ /* Check bits in range mask */
jl L(RANGEMASK_CHECK) jl L(RANGEMASK_CHECK)
# LOE rbx r15 r12d r13d # LOE rbx r15 r12d r13d
@ -190,7 +189,7 @@ L(SPECIAL_VALUES_LOOP):
cfi_restore(14) cfi_restore(14)
vmovups 128(%rsp), %zmm0 vmovups 128(%rsp), %zmm0
/* Go to exit */ /* Go to exit */
jmp L(EXIT) jmp L(EXIT)
/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
@ -200,19 +199,19 @@ L(SPECIAL_VALUES_LOOP):
.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
# LOE rbx r12 r13 r14 r15 zmm0 # LOE rbx r12 r13 r14 r15 zmm0
/* Scalar math fucntion call /* Scalar math fucntion call
* to process special input * to process special input
*/ */
L(SCALAR_MATH_CALL): L(SCALAR_MATH_CALL):
movl %r12d, %r14d movl %r12d, %r14d
movsd 64(%rsp,%r14,8), %xmm0 movsd 64(%rsp, %r14, 8), %xmm0
call log2@PLT call log2@PLT
# LOE rbx r14 r15 r12d r13d xmm0 # LOE rbx r14 r15 r12d r13d xmm0
movsd %xmm0, 128(%rsp,%r14,8) movsd %xmm0, 128(%rsp, %r14, 8)
/* Process special inputs in loop */ /* Process special inputs in loop */
jmp L(SPECIAL_VALUES_LOOP) jmp L(SPECIAL_VALUES_LOOP)
# LOE rbx r15 r12d r13d # LOE rbx r15 r12d r13d
END(_ZGVeN8v_log2_skx) END(_ZGVeN8v_log2_skx)
@ -235,10 +234,10 @@ typedef struct {
__declspec(align(64)) VUINT32 poly_coeff3[8][2]; __declspec(align(64)) VUINT32 poly_coeff3[8][2];
__declspec(align(64)) VUINT32 poly_coeff2[8][2]; __declspec(align(64)) VUINT32 poly_coeff2[8][2];
__declspec(align(64)) VUINT32 poly_coeff1[8][2]; __declspec(align(64)) VUINT32 poly_coeff1[8][2];
} __svml_dlog2_data_internal_avx512; } __svml_dlog2_data_internal_avx512;
#endif #endif
__svml_dlog2_data_internal_avx512: __svml_dlog2_data_internal_avx512:
/*== Log_tbl ==*/ /* Log_tbl */
.quad 0x0000000000000000 .quad 0x0000000000000000
.quad 0xbfb663f6fac91316 .quad 0xbfb663f6fac91316
.quad 0xbfc5c01a39fbd688 .quad 0xbfc5c01a39fbd688
@ -255,39 +254,39 @@ __svml_dlog2_data_internal_avx512:
.quad 0x3fc22dadc2ab3497 .quad 0x3fc22dadc2ab3497
.quad 0x3fb7d60496cfbb4c .quad 0x3fb7d60496cfbb4c
.quad 0x3fa77394c9d958d5 .quad 0x3fa77394c9d958d5
/*== One ==*/ /* One */
.align 64 .align 64
.quad 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000 .quad 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000
/*== C075 0.75 ==*/ /* C075 0.75 */
.align 64 .align 64
.quad 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000 .quad 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000
/*== poly_coeff9 ==*/ /* poly_coeff9 */
.align 64 .align 64
.quad 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12 .quad 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12
/*== poly_coeff8 ==*/ /* poly_coeff8 */
.align 64 .align 64
.quad 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce .quad 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce
/*== poly_coeff7 ==*/ /* poly_coeff7 */
.align 64 .align 64
.quad 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613 .quad 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613
/*== poly_coeff6 ==*/ /* poly_coeff6 */
.align 64 .align 64
.quad 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c .quad 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c
/*== poly_coeff5 ==*/ /* poly_coeff5 */
.align 64 .align 64
.quad 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a .quad 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a
/*== poly_coeff4 ==*/ /* poly_coeff4 */
.align 64 .align 64
.quad 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d .quad 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d
/*== poly_coeff3 ==*/ /* poly_coeff3 */
.align 64 .align 64
.quad 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f .quad 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f
/*== poly_coeff2 ==*/ /* poly_coeff2 */
.align 64 .align 64
.quad 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4 .quad 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4
/*== poly_coeff1 ==*/ /* poly_coeff1 */
.align 64 .align 64
.quad 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe .quad 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe
.align 64 .align 64
.type __svml_dlog2_data_internal_avx512,@object .type __svml_dlog2_data_internal_avx512, @object
.size __svml_dlog2_data_internal_avx512,.-__svml_dlog2_data_internal_avx512 .size __svml_dlog2_data_internal_avx512, .-__svml_dlog2_data_internal_avx512