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x86_64: Fix svml_d_log28_core_avx512.S code formatting
This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
This commit is contained in:
Sunil K Pandey
parent
26b648892a
commit
993be2001c
@ -29,265 +29,264 @@
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/* Offsets for data table __svml_dlog2_data_internal_avx512
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/* Offsets for data table __svml_dlog2_data_internal_avx512
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*/
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*/
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#define Log_tbl 0
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#define Log_tbl 0
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#define One 128
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#define One 128
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#define C075 192
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#define C075 192
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#define poly_coeff9 256
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#define poly_coeff9 256
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#define poly_coeff8 320
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#define poly_coeff8 320
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#define poly_coeff7 384
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#define poly_coeff7 384
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#define poly_coeff6 448
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#define poly_coeff6 448
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#define poly_coeff5 512
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#define poly_coeff5 512
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#define poly_coeff4 576
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#define poly_coeff4 576
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#define poly_coeff3 640
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#define poly_coeff3 640
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#define poly_coeff2 704
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#define poly_coeff2 704
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#define poly_coeff1 768
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#define poly_coeff1 768
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#include <sysdep.h>
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#include <sysdep.h>
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.text
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.section .text.evex512, "ax", @progbits
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.section .text.evex512,"ax",@progbits
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ENTRY(_ZGVeN8v_log2_skx)
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ENTRY(_ZGVeN8v_log2_skx)
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pushq %rbp
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pushq %rbp
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cfi_def_cfa_offset(16)
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cfi_def_cfa_offset(16)
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movq %rsp, %rbp
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movq %rsp, %rbp
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cfi_def_cfa(6, 16)
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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cfi_offset(6, -16)
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andq $-64, %rsp
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andq $-64, %rsp
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subq $192, %rsp
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subq $192, %rsp
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vmovaps %zmm0, %zmm7
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vmovaps %zmm0, %zmm7
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vgetmantpd $8, {sae}, %zmm7, %zmm6
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vgetmantpd $8, {sae}, %zmm7, %zmm6
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vmovups One+__svml_dlog2_data_internal_avx512(%rip), %zmm2
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vmovups One+__svml_dlog2_data_internal_avx512(%rip), %zmm2
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vmovups poly_coeff5+__svml_dlog2_data_internal_avx512(%rip), %zmm12
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vmovups poly_coeff5+__svml_dlog2_data_internal_avx512(%rip), %zmm12
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vmovups poly_coeff3+__svml_dlog2_data_internal_avx512(%rip), %zmm13
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vmovups poly_coeff3+__svml_dlog2_data_internal_avx512(%rip), %zmm13
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/* Start polynomial evaluation */
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/* Start polynomial evaluation */
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vmovups poly_coeff9+__svml_dlog2_data_internal_avx512(%rip), %zmm10
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vmovups poly_coeff9+__svml_dlog2_data_internal_avx512(%rip), %zmm10
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vmovups poly_coeff8+__svml_dlog2_data_internal_avx512(%rip), %zmm0
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vmovups poly_coeff8+__svml_dlog2_data_internal_avx512(%rip), %zmm0
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vmovups poly_coeff7+__svml_dlog2_data_internal_avx512(%rip), %zmm11
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vmovups poly_coeff7+__svml_dlog2_data_internal_avx512(%rip), %zmm11
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vmovups poly_coeff6+__svml_dlog2_data_internal_avx512(%rip), %zmm14
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vmovups poly_coeff6+__svml_dlog2_data_internal_avx512(%rip), %zmm14
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/* Prepare exponent correction: DblRcp<0.75? */
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/* Prepare exponent correction: DblRcp<0.75? */
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vmovups C075+__svml_dlog2_data_internal_avx512(%rip), %zmm1
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vmovups C075+__svml_dlog2_data_internal_avx512(%rip), %zmm1
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/* Table lookup */
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/* Table lookup */
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vmovups __svml_dlog2_data_internal_avx512(%rip), %zmm4
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vmovups __svml_dlog2_data_internal_avx512(%rip), %zmm4
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/* GetExp(x) */
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/* GetExp(x) */
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vgetexppd {sae}, %zmm7, %zmm5
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vgetexppd {sae}, %zmm7, %zmm5
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/* DblRcp ~ 1/Mantissa */
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/* DblRcp ~ 1/Mantissa */
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vrcp14pd %zmm6, %zmm8
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vrcp14pd %zmm6, %zmm8
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/* x<=0? */
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/* x<=0? */
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vfpclasspd $94, %zmm7, %k0
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vfpclasspd $94, %zmm7, %k0
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/* round DblRcp to 4 fractional bits (RN mode, no Precision exception) */
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/* round DblRcp to 4 fractional bits (RN mode, no Precision exception) */
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vrndscalepd $88, {sae}, %zmm8, %zmm3
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vrndscalepd $88, {sae}, %zmm8, %zmm3
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vmovups poly_coeff4+__svml_dlog2_data_internal_avx512(%rip), %zmm8
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vmovups poly_coeff4+__svml_dlog2_data_internal_avx512(%rip), %zmm8
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kmovw %k0, %edx
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kmovw %k0, %edx
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/* Reduced argument: R = DblRcp*Mantissa - 1 */
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/* Reduced argument: R = DblRcp*Mantissa - 1 */
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vfmsub213pd {rn-sae}, %zmm2, %zmm3, %zmm6
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vfmsub213pd {rn-sae}, %zmm2, %zmm3, %zmm6
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vcmppd $17, {sae}, %zmm1, %zmm3, %k1
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vcmppd $17, {sae}, %zmm1, %zmm3, %k1
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vfmadd231pd {rn-sae}, %zmm6, %zmm12, %zmm8
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vfmadd231pd {rn-sae}, %zmm6, %zmm12, %zmm8
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vmovups poly_coeff2+__svml_dlog2_data_internal_avx512(%rip), %zmm12
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vmovups poly_coeff2+__svml_dlog2_data_internal_avx512(%rip), %zmm12
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vfmadd231pd {rn-sae}, %zmm6, %zmm10, %zmm0
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vfmadd231pd {rn-sae}, %zmm6, %zmm10, %zmm0
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vfmadd231pd {rn-sae}, %zmm6, %zmm11, %zmm14
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vfmadd231pd {rn-sae}, %zmm6, %zmm11, %zmm14
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vmovups poly_coeff1+__svml_dlog2_data_internal_avx512(%rip), %zmm1
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vmovups poly_coeff1+__svml_dlog2_data_internal_avx512(%rip), %zmm1
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/* R^2 */
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/* R^2 */
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vmulpd {rn-sae}, %zmm6, %zmm6, %zmm15
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vmulpd {rn-sae}, %zmm6, %zmm6, %zmm15
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vfmadd231pd {rn-sae}, %zmm6, %zmm13, %zmm12
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vfmadd231pd {rn-sae}, %zmm6, %zmm13, %zmm12
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/* Prepare table index */
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/* Prepare table index */
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vpsrlq $48, %zmm3, %zmm9
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vpsrlq $48, %zmm3, %zmm9
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/* add 1 to Expon if DblRcp<0.75 */
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/* add 1 to Expon if DblRcp<0.75 */
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vaddpd {rn-sae}, %zmm2, %zmm5, %zmm5{%k1}
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vaddpd {rn-sae}, %zmm2, %zmm5, %zmm5{%k1}
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vmulpd {rn-sae}, %zmm15, %zmm15, %zmm13
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vmulpd {rn-sae}, %zmm15, %zmm15, %zmm13
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vfmadd213pd {rn-sae}, %zmm14, %zmm15, %zmm0
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vfmadd213pd {rn-sae}, %zmm14, %zmm15, %zmm0
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vfmadd213pd {rn-sae}, %zmm12, %zmm15, %zmm8
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vfmadd213pd {rn-sae}, %zmm12, %zmm15, %zmm8
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vpermt2pd Log_tbl+64+__svml_dlog2_data_internal_avx512(%rip), %zmm9, %zmm4
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vpermt2pd Log_tbl+64+__svml_dlog2_data_internal_avx512(%rip), %zmm9, %zmm4
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/* polynomial */
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/* polynomial */
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vfmadd213pd {rn-sae}, %zmm8, %zmm13, %zmm0
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vfmadd213pd {rn-sae}, %zmm8, %zmm13, %zmm0
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vfmadd213pd {rn-sae}, %zmm1, %zmm6, %zmm0
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vfmadd213pd {rn-sae}, %zmm1, %zmm6, %zmm0
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vfmadd213pd {rn-sae}, %zmm4, %zmm0, %zmm6
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vfmadd213pd {rn-sae}, %zmm4, %zmm0, %zmm6
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vaddpd {rn-sae}, %zmm6, %zmm5, %zmm0
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vaddpd {rn-sae}, %zmm6, %zmm5, %zmm0
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testl %edx, %edx
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testl %edx, %edx
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/* Go to special inputs processing branch */
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/* Go to special inputs processing branch */
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jne L(SPECIAL_VALUES_BRANCH)
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jne L(SPECIAL_VALUES_BRANCH)
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# LOE rbx r12 r13 r14 r15 edx zmm0 zmm7
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# LOE rbx r12 r13 r14 r15 edx zmm0 zmm7
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/* Restore registers
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/* Restore registers
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* and exit the function
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* and exit the function
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*/
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*/
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L(EXIT):
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L(EXIT):
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movq %rbp, %rsp
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movq %rbp, %rsp
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popq %rbp
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popq %rbp
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cfi_def_cfa(7, 8)
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cfi_def_cfa(7, 8)
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cfi_restore(6)
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cfi_restore(6)
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ret
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ret
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cfi_def_cfa(6, 16)
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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cfi_offset(6, -16)
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/* Branch to process
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/* Branch to process
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* special inputs
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* special inputs
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*/
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*/
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L(SPECIAL_VALUES_BRANCH):
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L(SPECIAL_VALUES_BRANCH):
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vmovups %zmm7, 64(%rsp)
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vmovups %zmm7, 64(%rsp)
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vmovups %zmm0, 128(%rsp)
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vmovups %zmm0, 128(%rsp)
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# LOE rbx r12 r13 r14 r15 edx zmm0
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# LOE rbx r12 r13 r14 r15 edx zmm0
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xorl %eax, %eax
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xorl %eax, %eax
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# LOE rbx r12 r13 r14 r15 eax edx
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# LOE rbx r12 r13 r14 r15 eax edx
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vzeroupper
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vzeroupper
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movq %r12, 16(%rsp)
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movq %r12, 16(%rsp)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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movl %eax, %r12d
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movl %eax, %r12d
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movq %r13, 8(%rsp)
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movq %r13, 8(%rsp)
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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movl %edx, %r13d
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movl %edx, %r13d
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movq %r14, (%rsp)
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movq %r14, (%rsp)
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r15 r12d r13d
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# LOE rbx r15 r12d r13d
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/* Range mask
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/* Range mask
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* bits check
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* bits check
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*/
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*/
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L(RANGEMASK_CHECK):
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L(RANGEMASK_CHECK):
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btl %r12d, %r13d
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btl %r12d, %r13d
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/* Call scalar math function */
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/* Call scalar math function */
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jc L(SCALAR_MATH_CALL)
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jc L(SCALAR_MATH_CALL)
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# LOE rbx r15 r12d r13d
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# LOE rbx r15 r12d r13d
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/* Special inputs
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/* Special inputs
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* processing loop
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* processing loop
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*/
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*/
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L(SPECIAL_VALUES_LOOP):
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L(SPECIAL_VALUES_LOOP):
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incl %r12d
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incl %r12d
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cmpl $8, %r12d
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cmpl $8, %r12d
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/* Check bits in range mask */
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/* Check bits in range mask */
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jl L(RANGEMASK_CHECK)
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jl L(RANGEMASK_CHECK)
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# LOE rbx r15 r12d r13d
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# LOE rbx r15 r12d r13d
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movq 16(%rsp), %r12
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movq 16(%rsp), %r12
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cfi_restore(12)
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cfi_restore(12)
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movq 8(%rsp), %r13
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movq 8(%rsp), %r13
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cfi_restore(13)
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cfi_restore(13)
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movq (%rsp), %r14
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movq (%rsp), %r14
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cfi_restore(14)
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cfi_restore(14)
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vmovups 128(%rsp), %zmm0
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vmovups 128(%rsp), %zmm0
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/* Go to exit */
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/* Go to exit */
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jmp L(EXIT)
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jmp L(EXIT)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r12 r13 r14 r15 zmm0
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# LOE rbx r12 r13 r14 r15 zmm0
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/* Scalar math fucntion call
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/* Scalar math fucntion call
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* to process special input
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* to process special input
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*/
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*/
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L(SCALAR_MATH_CALL):
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L(SCALAR_MATH_CALL):
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movl %r12d, %r14d
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movl %r12d, %r14d
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movsd 64(%rsp,%r14,8), %xmm0
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movsd 64(%rsp, %r14, 8), %xmm0
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call log2@PLT
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call log2@PLT
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# LOE rbx r14 r15 r12d r13d xmm0
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# LOE rbx r14 r15 r12d r13d xmm0
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movsd %xmm0, 128(%rsp,%r14,8)
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movsd %xmm0, 128(%rsp, %r14, 8)
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/* Process special inputs in loop */
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/* Process special inputs in loop */
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||||||
jmp L(SPECIAL_VALUES_LOOP)
|
jmp L(SPECIAL_VALUES_LOOP)
|
||||||
# LOE rbx r15 r12d r13d
|
# LOE rbx r15 r12d r13d
|
||||||
END(_ZGVeN8v_log2_skx)
|
END(_ZGVeN8v_log2_skx)
|
||||||
|
|
||||||
.section .rodata, "a"
|
.section .rodata, "a"
|
||||||
.align 64
|
.align 64
|
||||||
|
|
||||||
#ifdef __svml_dlog2_data_internal_avx512_typedef
|
#ifdef __svml_dlog2_data_internal_avx512_typedef
|
||||||
typedef unsigned int VUINT32;
|
typedef unsigned int VUINT32;
|
||||||
typedef struct {
|
typedef struct {
|
||||||
__declspec(align(64)) VUINT32 Log_tbl[16][2];
|
__declspec(align(64)) VUINT32 Log_tbl[16][2];
|
||||||
__declspec(align(64)) VUINT32 One[8][2];
|
__declspec(align(64)) VUINT32 One[8][2];
|
||||||
__declspec(align(64)) VUINT32 C075[8][2];
|
__declspec(align(64)) VUINT32 C075[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff9[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff9[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff8[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff8[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff7[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff7[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff6[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff6[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff5[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff5[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff4[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff4[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff3[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff3[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff2[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff2[8][2];
|
||||||
__declspec(align(64)) VUINT32 poly_coeff1[8][2];
|
__declspec(align(64)) VUINT32 poly_coeff1[8][2];
|
||||||
} __svml_dlog2_data_internal_avx512;
|
} __svml_dlog2_data_internal_avx512;
|
||||||
#endif
|
#endif
|
||||||
__svml_dlog2_data_internal_avx512:
|
__svml_dlog2_data_internal_avx512:
|
||||||
/*== Log_tbl ==*/
|
/* Log_tbl */
|
||||||
.quad 0x0000000000000000
|
.quad 0x0000000000000000
|
||||||
.quad 0xbfb663f6fac91316
|
.quad 0xbfb663f6fac91316
|
||||||
.quad 0xbfc5c01a39fbd688
|
.quad 0xbfc5c01a39fbd688
|
||||||
.quad 0xbfcfbc16b902680a
|
.quad 0xbfcfbc16b902680a
|
||||||
.quad 0xbfd49a784bcd1b8b
|
.quad 0xbfd49a784bcd1b8b
|
||||||
.quad 0xbfd91bba891f1709
|
.quad 0xbfd91bba891f1709
|
||||||
.quad 0xbfdd6753e032ea0f
|
.quad 0xbfdd6753e032ea0f
|
||||||
.quad 0xbfe0c10500d63aa6
|
.quad 0xbfe0c10500d63aa6
|
||||||
.quad 0x3fda8ff971810a5e
|
.quad 0x3fda8ff971810a5e
|
||||||
.quad 0x3fd6cb0f6865c8ea
|
.quad 0x3fd6cb0f6865c8ea
|
||||||
.quad 0x3fd32bfee370ee68
|
.quad 0x3fd32bfee370ee68
|
||||||
.quad 0x3fcf5fd8a9063e35
|
.quad 0x3fcf5fd8a9063e35
|
||||||
.quad 0x3fc8a8980abfbd32
|
.quad 0x3fc8a8980abfbd32
|
||||||
.quad 0x3fc22dadc2ab3497
|
.quad 0x3fc22dadc2ab3497
|
||||||
.quad 0x3fb7d60496cfbb4c
|
.quad 0x3fb7d60496cfbb4c
|
||||||
.quad 0x3fa77394c9d958d5
|
.quad 0x3fa77394c9d958d5
|
||||||
/*== One ==*/
|
/* One */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000
|
.quad 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000
|
||||||
/*== C075 0.75 ==*/
|
/* C075 0.75 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000
|
.quad 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000, 0x3fe8000000000000
|
||||||
/*== poly_coeff9 ==*/
|
/* poly_coeff9 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12
|
.quad 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12, 0x3fc4904bda0e1d12
|
||||||
/*== poly_coeff8 ==*/
|
/* poly_coeff8 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce
|
.quad 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce, 0xbfc71fb84deb5cce
|
||||||
/*== poly_coeff7 ==*/
|
/* poly_coeff7 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613
|
.quad 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613, 0x3fca617351818613
|
||||||
/*== poly_coeff6 ==*/
|
/* poly_coeff6 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c
|
.quad 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c, 0xbfcec707e4e3144c
|
||||||
/*== poly_coeff5 ==*/
|
/* poly_coeff5 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a
|
.quad 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a, 0x3fd2776c5114d91a
|
||||||
/*== poly_coeff4 ==*/
|
/* poly_coeff4 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d
|
.quad 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d, 0xbfd71547653d0f8d
|
||||||
/*== poly_coeff3 ==*/
|
/* poly_coeff3 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f
|
.quad 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f, 0x3fdec709dc3a029f
|
||||||
/*== poly_coeff2 ==*/
|
/* poly_coeff2 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4
|
.quad 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4, 0xbfe71547652b82d4
|
||||||
/*== poly_coeff1 ==*/
|
/* poly_coeff1 */
|
||||||
.align 64
|
.align 64
|
||||||
.quad 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe
|
.quad 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe, 0x3ff71547652b82fe
|
||||||
.align 64
|
.align 64
|
||||||
.type __svml_dlog2_data_internal_avx512,@object
|
.type __svml_dlog2_data_internal_avx512, @object
|
||||||
.size __svml_dlog2_data_internal_avx512,.-__svml_dlog2_data_internal_avx512
|
.size __svml_dlog2_data_internal_avx512, .-__svml_dlog2_data_internal_avx512
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user