AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-24 05:50:14 +00:00
Code Issues Packages Projects Releases Wiki Activity

stdlib: longlong.h: Do no use asm input cast for clang

Browse Source 
clang by default rejects the input casts with:

  error: invalid use of a cast in a inline asm context requiring an
  lvalue: remove the cast or build with -fheinous-gnu-extensions

And even with -fheinous-gnu-extensions clang still throws an warning
and also states that this option might be removed in the future.
For gcc the cast are still useful [1] as type-checking.

[1] https://gcc.gnu.org/pipermail/gcc-patches/2021-October/581722.html
This commit is contained in:
Adhemerval Zanella 2023-09-13 18:02:57 -03:00
parent a7df44378e
commit 9a30e8cf4f
1 changed files with 28 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

48
stdlib/longlong.h
View File

@ -57,6 +57,14 @@
#define attribute_hidden #define attribute_hidden
#endif #endif
/* clang does not support output constraint as lvalue, while gcc uses it as a
simple type check. */
#ifdef __clang__
# define __asm_output_check_type(__type, __arg) (__arg)
#else
# define __asm_output_check_type(__type, __arg) ((__type)(__arg))
#endif
extern const UQItype __clz_tab[256] attribute_hidden; extern const UQItype __clz_tab[256] attribute_hidden;
/* Define auxiliary asm macros. /* Define auxiliary asm macros.
@ -230,16 +238,16 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
&& W_TYPE_SIZE == 32 && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \ __asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
: "=r" ((USItype) (sh)), \ : "=r" __asm_output_check_type (USItype, sh), \
"=&r" ((USItype) (sl)) \ "=&r" __asm_output_check_type (USItype, sl) \
: "%r" ((USItype) (ah)), \ : "%r" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \ "rI" ((USItype) (bh)), \
"%r" ((USItype) (al)), \ "%r" ((USItype) (al)), \
"rI" ((USItype) (bl)) __CLOBBER_CC) "rI" ((USItype) (bl)) __CLOBBER_CC)
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \ __asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \
: "=r" ((USItype) (sh)), \ : "=r" __asm_output_check_type (USItype, sh), \
"=&r" ((USItype) (sl)) \ "=&r" __asm_output_check_type (USItype, sl) \
: "r" ((USItype) (ah)), \ : "r" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \ "rI" ((USItype) (bh)), \
"r" ((USItype) (al)), \ "r" ((USItype) (al)), \
@ -456,30 +464,30 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \ __asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \
: "=r" ((USItype) (sh)), \ : "=r" __asm_output_check_type (USItype, sh), \
"=&r" ((USItype) (sl)) \ "=&r" __asm_output_check_type(USItype, sl) \
: "%0" ((USItype) (ah)), \ : "%0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \ "g" ((USItype) (bh)), \
"%1" ((USItype) (al)), \ "%1" ((USItype) (al)), \
"g" ((USItype) (bl))) "g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \ __asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \
: "=r" ((USItype) (sh)), \ : "=r" __asm_output_check_type (USItype, sh), \
"=&r" ((USItype) (sl)) \ "=&r" __asm_output_check_type (USItype, sl) \
: "0" ((USItype) (ah)), \ : "0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \ "g" ((USItype) (bh)), \
"1" ((USItype) (al)), \ "1" ((USItype) (al)), \
"g" ((USItype) (bl))) "g" ((USItype) (bl)))
#define umul_ppmm(w1, w0, u, v) \ #define umul_ppmm(w1, w0, u, v) \
__asm__ ("mul{l} %3" \ __asm__ ("mul{l} %3" \
: "=a" ((USItype) (w0)), \ : "=a" __asm_output_check_type (USItype, w0), \
"=d" ((USItype) (w1)) \ "=d" __asm_output_check_type (USItype, w1) \
: "%0" ((USItype) (u)), \ : "%0" ((USItype) (u)), \
"rm" ((USItype) (v))) "rm" ((USItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, dv) \ #define udiv_qrnnd(q, r, n1, n0, dv) \
__asm__ ("div{l} %4" \ __asm__ ("div{l} %4" \
: "=a" ((USItype) (q)), \ : "=a" __asm_output_check_type (USItype, q), \
"=d" ((USItype) (r)) \ "=d" __asm_output_check_type (USItype, r) \
: "0" ((USItype) (n0)), \ : "0" ((USItype) (n0)), \
"1" ((USItype) (n1)), \ "1" ((USItype) (n1)), \
"rm" ((USItype) (dv))) "rm" ((USItype) (dv)))
@ -492,30 +500,30 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__x86_64__) && W_TYPE_SIZE == 64 #if defined (__x86_64__) && W_TYPE_SIZE == 64
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \ __asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \
: "=r" ((UDItype) (sh)), \ : "=r" __asm_output_check_type (UDItype, sh), \
"=&r" ((UDItype) (sl)) \ "=&r" __asm_output_check_type (UDItype, sl) \
: "%0" ((UDItype) (ah)), \ : "%0" ((UDItype) (ah)), \
"rme" ((UDItype) (bh)), \ "rme" ((UDItype) (bh)), \
"%1" ((UDItype) (al)), \ "%1" ((UDItype) (al)), \
"rme" ((UDItype) (bl))) "rme" ((UDItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \ __asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \
: "=r" ((UDItype) (sh)), \ : "=r" __asm_output_check_type (UDItype, sh), \
"=&r" ((UDItype) (sl)) \ "=&r" __asm_output_check_type (UDItype, sl) \
: "0" ((UDItype) (ah)), \ : "0" ((UDItype) (ah)), \
"rme" ((UDItype) (bh)), \ "rme" ((UDItype) (bh)), \
"1" ((UDItype) (al)), \ "1" ((UDItype) (al)), \
"rme" ((UDItype) (bl))) "rme" ((UDItype) (bl)))
#define umul_ppmm(w1, w0, u, v) \ #define umul_ppmm(w1, w0, u, v) \
__asm__ ("mul{q} %3" \ __asm__ ("mul{q} %3" \
: "=a" ((UDItype) (w0)), \ : "=a" __asm_output_check_type (UDItype, w0), \
"=d" ((UDItype) (w1)) \ "=d" __asm_output_check_type (UDItype, w1) \
: "%0" ((UDItype) (u)), \ : "%0" ((UDItype) (u)), \
"rm" ((UDItype) (v))) "rm" ((UDItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, dv) \ #define udiv_qrnnd(q, r, n1, n0, dv) \
__asm__ ("div{q} %4" \ __asm__ ("div{q} %4" \
: "=a" ((UDItype) (q)), \ : "=a" __asm_output_check_type (UDItype, q), \
"=d" ((UDItype) (r)) \ "=d" __asm_output_check_type (UDItype, r) \
: "0" ((UDItype) (n0)), \ : "0" ((UDItype) (n0)), \
"1" ((UDItype) (n1)), \ "1" ((UDItype) (n1)), \
"rm" ((UDItype) (dv))) "rm" ((UDItype) (dv)))