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x86_64: Fix svml_s_atanhf8_core_avx2.S code formatting
This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
This commit is contained in:
Sunil K Pandey
parent
5aa7f304d9
commit
a14edf4781
@ -32,304 +32,303 @@
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/* Offsets for data table __svml_satanh_data_internal
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*/
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#define SgnMask 0
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#define sOne 32
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#define sPoly 64
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#define iBrkValue 320
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#define iOffExpoMask 352
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#define sHalf 384
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#define sSign 416
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#define sTopMask12 448
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#define TinyRange 480
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#define sLn2 512
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#define SgnMask 0
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#define sOne 32
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#define sPoly 64
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#define iBrkValue 320
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#define iOffExpoMask 352
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#define sHalf 384
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#define sSign 416
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#define sTopMask12 448
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#define TinyRange 480
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#define sLn2 512
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#include <sysdep.h>
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.text
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.section .text.avx2,"ax",@progbits
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.section .text.avx2, "ax", @progbits
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ENTRY(_ZGVdN8v_atanhf_avx2)
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pushq %rbp
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cfi_def_cfa_offset(16)
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movq %rsp, %rbp
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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andq $-32, %rsp
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subq $96, %rsp
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pushq %rbp
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cfi_def_cfa_offset(16)
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movq %rsp, %rbp
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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andq $-32, %rsp
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subq $96, %rsp
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/* Load constants including One = 1 */
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vmovups sOne+__svml_satanh_data_internal(%rip), %ymm5
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vmovups sTopMask12+__svml_satanh_data_internal(%rip), %ymm13
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vmovaps %ymm0, %ymm6
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/* Load constants including One = 1 */
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vmovups sOne+__svml_satanh_data_internal(%rip), %ymm5
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vmovups sTopMask12+__svml_satanh_data_internal(%rip), %ymm13
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vmovaps %ymm0, %ymm6
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/* Strip off the sign, so treat X as positive until right at the end */
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vandps SgnMask+__svml_satanh_data_internal(%rip), %ymm6, %ymm10
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vsubps %ymm10, %ymm5, %ymm1
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/* Strip off the sign, so treat X as positive until right at the end */
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vandps SgnMask+__svml_satanh_data_internal(%rip), %ymm6, %ymm10
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vsubps %ymm10, %ymm5, %ymm1
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/*
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* Compute V = 2 * X trivially, and UHi + U_lo = 1 - X in two pieces,
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* the upper part UHi being <= 12 bits long. Then we have
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* atanh(X) = 1/2 * log((1 + X) / (1 - X)) = 1/2 * log1p(V / (UHi + ULo)).
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*/
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vaddps %ymm10, %ymm10, %ymm14
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/*
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* Compute V = 2 * X trivially, and UHi + U_lo = 1 - X in two pieces,
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* the upper part UHi being <= 12 bits long. Then we have
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* atanh(X) = 1/2 * log((1 + X) / (1 - X)) = 1/2 * log1p(V / (UHi + ULo)).
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*/
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vaddps %ymm10, %ymm10, %ymm14
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/*
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* Check whether |X| < 1, in which case we use the main function.
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* Otherwise set the rangemask so that the callout will get used.
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* Note that this will also use the callout for NaNs since not(NaN < 1).
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*/
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vcmpnlt_uqps %ymm5, %ymm10, %ymm7
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vsubps %ymm1, %ymm5, %ymm9
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vcmplt_oqps TinyRange+__svml_satanh_data_internal(%rip), %ymm10, %ymm4
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vrcpps %ymm1, %ymm11
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vsubps %ymm10, %ymm9, %ymm12
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vandps %ymm13, %ymm11, %ymm0
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/*
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* Check whether |X| < 1, in which case we use the main function.
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* Otherwise set the rangemask so that the callout will get used.
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* Note that this will also use the callout for NaNs since not(NaN < 1).
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*/
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vcmpnlt_uqps %ymm5, %ymm10, %ymm7
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vsubps %ymm1, %ymm5, %ymm9
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vcmplt_oqps TinyRange+__svml_satanh_data_internal(%rip), %ymm10, %ymm4
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vrcpps %ymm1, %ymm11
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vsubps %ymm10, %ymm9, %ymm12
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vandps %ymm13, %ymm11, %ymm0
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/* No need to split sU when FMA is available */
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vfnmadd213ps %ymm5, %ymm0, %ymm1
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vmovaps %ymm6, %ymm8
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vfmadd213ps %ymm6, %ymm6, %ymm8
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vfnmadd231ps %ymm0, %ymm12, %ymm1
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/* No need to split sU when FMA is available */
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vfnmadd213ps %ymm5, %ymm0, %ymm1
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vmovaps %ymm6, %ymm8
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vfmadd213ps %ymm6, %ymm6, %ymm8
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vfnmadd231ps %ymm0, %ymm12, %ymm1
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/*
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* Split V as well into upper 12 bits and lower part, so that we can get
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* a preliminary quotient estimate without rounding error.
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*/
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vandps %ymm13, %ymm14, %ymm15
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vmovmskps %ymm7, %edx
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vsubps %ymm15, %ymm14, %ymm7
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/*
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* Split V as well into upper 12 bits and lower part, so that we can get
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* a preliminary quotient estimate without rounding error.
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*/
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vandps %ymm13, %ymm14, %ymm15
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vmovmskps %ymm7, %edx
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vsubps %ymm15, %ymm14, %ymm7
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/* Hence get initial quotient estimate QHi + QLo = R * VHi + R * VLo */
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vmulps %ymm15, %ymm0, %ymm10
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/* Hence get initial quotient estimate QHi + QLo = R * VHi + R * VLo */
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vmulps %ymm15, %ymm0, %ymm10
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/* Compute D = E + E^2 */
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vfmadd213ps %ymm1, %ymm1, %ymm1
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/* Compute D = E + E^2 */
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vfmadd213ps %ymm1, %ymm1, %ymm1
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/* Record the sign for eventual reincorporation. */
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vandps sSign+__svml_satanh_data_internal(%rip), %ymm6, %ymm3
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/* Record the sign for eventual reincorporation. */
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vandps sSign+__svml_satanh_data_internal(%rip), %ymm6, %ymm3
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/* Or the sign bit in with the tiny result to handle atanh(-0) correctly */
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vorps %ymm3, %ymm8, %ymm2
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vmulps %ymm7, %ymm0, %ymm8
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/* Or the sign bit in with the tiny result to handle atanh(-0) correctly */
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vorps %ymm3, %ymm8, %ymm2
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vmulps %ymm7, %ymm0, %ymm8
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/*
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* Compute R * (VHi + VLo) * (1 + E + E^2)
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* = R * (VHi + VLo) * (1 + D)
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* = QHi + (QHi * D + QLo + QLo * D)
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*/
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vmulps %ymm1, %ymm10, %ymm9
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vfmadd213ps %ymm8, %ymm8, %ymm1
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vaddps %ymm1, %ymm9, %ymm1
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/*
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* Compute R * (VHi + VLo) * (1 + E + E^2)
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* = R * (VHi + VLo) * (1 + D)
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* = QHi + (QHi * D + QLo + QLo * D)
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*/
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vmulps %ymm1, %ymm10, %ymm9
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vfmadd213ps %ymm8, %ymm8, %ymm1
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vaddps %ymm1, %ymm9, %ymm1
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/* reduction: compute r,n */
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vmovups iBrkValue+__svml_satanh_data_internal(%rip), %ymm9
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/* reduction: compute r, n */
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vmovups iBrkValue+__svml_satanh_data_internal(%rip), %ymm9
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/*
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* Now finally accumulate the high and low parts of the
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* argument to log1p, H + L, with a final compensated summation.
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*/
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vaddps %ymm1, %ymm10, %ymm12
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vsubps %ymm12, %ymm10, %ymm11
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/*
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* Now finally accumulate the high and low parts of the
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* argument to log1p, H + L, with a final compensated summation.
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*/
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vaddps %ymm1, %ymm10, %ymm12
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vsubps %ymm12, %ymm10, %ymm11
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/*
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* Now we feed into the log1p code, using H in place of _VARG1 and
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* later incorporating L into the reduced argument.
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* compute 1+x as high, low parts
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*/
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vmaxps %ymm12, %ymm5, %ymm13
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vminps %ymm12, %ymm5, %ymm14
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vaddps %ymm11, %ymm1, %ymm0
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vaddps %ymm14, %ymm13, %ymm1
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vpsubd %ymm9, %ymm1, %ymm7
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vsubps %ymm1, %ymm13, %ymm15
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vpsrad $23, %ymm7, %ymm10
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vpand iOffExpoMask+__svml_satanh_data_internal(%rip), %ymm7, %ymm8
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vaddps %ymm15, %ymm14, %ymm13
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vpslld $23, %ymm10, %ymm11
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vpaddd %ymm9, %ymm8, %ymm15
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vaddps %ymm13, %ymm0, %ymm14
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vcvtdq2ps %ymm10, %ymm0
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vpsubd %ymm11, %ymm5, %ymm12
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/*
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* Now we feed into the log1p code, using H in place of _VARG1 and
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* later incorporating L into the reduced argument.
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* compute 1+x as high, low parts
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*/
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vmaxps %ymm12, %ymm5, %ymm13
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vminps %ymm12, %ymm5, %ymm14
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vaddps %ymm11, %ymm1, %ymm0
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vaddps %ymm14, %ymm13, %ymm1
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vpsubd %ymm9, %ymm1, %ymm7
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vsubps %ymm1, %ymm13, %ymm15
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vpsrad $23, %ymm7, %ymm10
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vpand iOffExpoMask+__svml_satanh_data_internal(%rip), %ymm7, %ymm8
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vaddps %ymm15, %ymm14, %ymm13
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vpslld $23, %ymm10, %ymm11
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vpaddd %ymm9, %ymm8, %ymm15
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vaddps %ymm13, %ymm0, %ymm14
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vcvtdq2ps %ymm10, %ymm0
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vpsubd %ymm11, %ymm5, %ymm12
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/* polynomial evaluation */
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vsubps %ymm5, %ymm15, %ymm5
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vmulps %ymm14, %ymm12, %ymm1
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vaddps %ymm5, %ymm1, %ymm5
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vmovups sPoly+224+__svml_satanh_data_internal(%rip), %ymm1
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vfmadd213ps sPoly+192+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+160+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+128+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+96+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+64+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+32+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vmulps %ymm1, %ymm5, %ymm7
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vfmadd213ps %ymm5, %ymm5, %ymm7
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/* polynomial evaluation */
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vsubps %ymm5, %ymm15, %ymm5
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vmulps %ymm14, %ymm12, %ymm1
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vaddps %ymm5, %ymm1, %ymm5
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vmovups sPoly+224+__svml_satanh_data_internal(%rip), %ymm1
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vfmadd213ps sPoly+192+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+160+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+128+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+96+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+64+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+32+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vfmadd213ps sPoly+__svml_satanh_data_internal(%rip), %ymm5, %ymm1
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vmulps %ymm1, %ymm5, %ymm7
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vfmadd213ps %ymm5, %ymm5, %ymm7
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/* final reconstruction */
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vfmadd132ps sLn2+__svml_satanh_data_internal(%rip), %ymm7, %ymm0
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/* final reconstruction */
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vfmadd132ps sLn2+__svml_satanh_data_internal(%rip), %ymm7, %ymm0
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/* Finally, halve the result and reincorporate the sign */
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vxorps sHalf+__svml_satanh_data_internal(%rip), %ymm3, %ymm3
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vmulps %ymm0, %ymm3, %ymm0
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vblendvps %ymm4, %ymm2, %ymm0, %ymm0
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testl %edx, %edx
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/* Finally, halve the result and reincorporate the sign */
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vxorps sHalf+__svml_satanh_data_internal(%rip), %ymm3, %ymm3
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vmulps %ymm0, %ymm3, %ymm0
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vblendvps %ymm4, %ymm2, %ymm0, %ymm0
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testl %edx, %edx
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/* Go to special inputs processing branch */
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jne L(SPECIAL_VALUES_BRANCH)
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# LOE rbx r12 r13 r14 r15 edx ymm0 ymm6
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/* Go to special inputs processing branch */
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jne L(SPECIAL_VALUES_BRANCH)
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# LOE rbx r12 r13 r14 r15 edx ymm0 ymm6
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/* Restore registers
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* and exit the function
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*/
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/* Restore registers
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* and exit the function
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*/
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L(EXIT):
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movq %rbp, %rsp
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popq %rbp
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cfi_def_cfa(7, 8)
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cfi_restore(6)
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ret
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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movq %rbp, %rsp
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popq %rbp
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cfi_def_cfa(7, 8)
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cfi_restore(6)
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ret
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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/* Branch to process
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* special inputs
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*/
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/* Branch to process
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* special inputs
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*/
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L(SPECIAL_VALUES_BRANCH):
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vmovups %ymm6, 32(%rsp)
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vmovups %ymm0, 64(%rsp)
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# LOE rbx r12 r13 r14 r15 edx ymm0
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vmovups %ymm6, 32(%rsp)
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vmovups %ymm0, 64(%rsp)
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# LOE rbx r12 r13 r14 r15 edx ymm0
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xorl %eax, %eax
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# LOE rbx r12 r13 r14 r15 eax edx
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xorl %eax, %eax
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# LOE rbx r12 r13 r14 r15 eax edx
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vzeroupper
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movq %r12, 16(%rsp)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
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movl %eax, %r12d
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movq %r13, 8(%rsp)
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
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movl %edx, %r13d
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movq %r14, (%rsp)
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r15 r12d r13d
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vzeroupper
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movq %r12, 16(%rsp)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
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movl %eax, %r12d
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movq %r13, 8(%rsp)
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
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movl %edx, %r13d
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movq %r14, (%rsp)
|
||||
/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
|
||||
.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
|
||||
# LOE rbx r15 r12d r13d
|
||||
|
||||
/* Range mask
|
||||
* bits check
|
||||
*/
|
||||
/* Range mask
|
||||
* bits check
|
||||
*/
|
||||
|
||||
L(RANGEMASK_CHECK):
|
||||
btl %r12d, %r13d
|
||||
btl %r12d, %r13d
|
||||
|
||||
/* Call scalar math function */
|
||||
jc L(SCALAR_MATH_CALL)
|
||||
# LOE rbx r15 r12d r13d
|
||||
/* Call scalar math function */
|
||||
jc L(SCALAR_MATH_CALL)
|
||||
# LOE rbx r15 r12d r13d
|
||||
|
||||
/* Special inputs
|
||||
* processing loop
|
||||
*/
|
||||
/* Special inputs
|
||||
* processing loop
|
||||
*/
|
||||
|
||||
L(SPECIAL_VALUES_LOOP):
|
||||
incl %r12d
|
||||
cmpl $8, %r12d
|
||||
incl %r12d
|
||||
cmpl $8, %r12d
|
||||
|
||||
/* Check bits in range mask */
|
||||
jl L(RANGEMASK_CHECK)
|
||||
# LOE rbx r15 r12d r13d
|
||||
/* Check bits in range mask */
|
||||
jl L(RANGEMASK_CHECK)
|
||||
# LOE rbx r15 r12d r13d
|
||||
|
||||
movq 16(%rsp), %r12
|
||||
cfi_restore(12)
|
||||
movq 8(%rsp), %r13
|
||||
cfi_restore(13)
|
||||
movq (%rsp), %r14
|
||||
cfi_restore(14)
|
||||
vmovups 64(%rsp), %ymm0
|
||||
movq 16(%rsp), %r12
|
||||
cfi_restore(12)
|
||||
movq 8(%rsp), %r13
|
||||
cfi_restore(13)
|
||||
movq (%rsp), %r14
|
||||
cfi_restore(14)
|
||||
vmovups 64(%rsp), %ymm0
|
||||
|
||||
/* Go to exit */
|
||||
jmp L(EXIT)
|
||||
/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
|
||||
.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
|
||||
/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
|
||||
.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
|
||||
/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
|
||||
.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
|
||||
# LOE rbx r12 r13 r14 r15 ymm0
|
||||
/* Go to exit */
|
||||
jmp L(EXIT)
|
||||
/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
|
||||
.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
|
||||
/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
|
||||
.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
|
||||
/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
|
||||
.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
|
||||
# LOE rbx r12 r13 r14 r15 ymm0
|
||||
|
||||
/* Scalar math fucntion call
|
||||
* to process special input
|
||||
*/
|
||||
/* Scalar math fucntion call
|
||||
* to process special input
|
||||
*/
|
||||
|
||||
L(SCALAR_MATH_CALL):
|
||||
movl %r12d, %r14d
|
||||
movss 32(%rsp,%r14,4), %xmm0
|
||||
call atanhf@PLT
|
||||
# LOE rbx r14 r15 r12d r13d xmm0
|
||||
movl %r12d, %r14d
|
||||
movss 32(%rsp, %r14, 4), %xmm0
|
||||
call atanhf@PLT
|
||||
# LOE rbx r14 r15 r12d r13d xmm0
|
||||
|
||||
movss %xmm0, 64(%rsp,%r14,4)
|
||||
movss %xmm0, 64(%rsp, %r14, 4)
|
||||
|
||||
/* Process special inputs in loop */
|
||||
jmp L(SPECIAL_VALUES_LOOP)
|
||||
# LOE rbx r15 r12d r13d
|
||||
/* Process special inputs in loop */
|
||||
jmp L(SPECIAL_VALUES_LOOP)
|
||||
# LOE rbx r15 r12d r13d
|
||||
END(_ZGVdN8v_atanhf_avx2)
|
||||
|
||||
.section .rodata, "a"
|
||||
.align 32
|
||||
.section .rodata, "a"
|
||||
.align 32
|
||||
|
||||
#ifdef __svml_satanh_data_internal_typedef
|
||||
typedef unsigned int VUINT32;
|
||||
typedef struct {
|
||||
__declspec(align(32)) VUINT32 SgnMask[8][1];
|
||||
__declspec(align(32)) VUINT32 sOne[8][1];
|
||||
__declspec(align(32)) VUINT32 sPoly[8][8][1];
|
||||
__declspec(align(32)) VUINT32 iBrkValue[8][1];
|
||||
__declspec(align(32)) VUINT32 iOffExpoMask[8][1];
|
||||
__declspec(align(32)) VUINT32 sHalf[8][1];
|
||||
__declspec(align(32)) VUINT32 sSign[8][1];
|
||||
__declspec(align(32)) VUINT32 sTopMask12[8][1];
|
||||
__declspec(align(32)) VUINT32 TinyRange[8][1];
|
||||
__declspec(align(32)) VUINT32 sLn2[8][1];
|
||||
__declspec(align(32)) VUINT32 SgnMask[8][1];
|
||||
__declspec(align(32)) VUINT32 sOne[8][1];
|
||||
__declspec(align(32)) VUINT32 sPoly[8][8][1];
|
||||
__declspec(align(32)) VUINT32 iBrkValue[8][1];
|
||||
__declspec(align(32)) VUINT32 iOffExpoMask[8][1];
|
||||
__declspec(align(32)) VUINT32 sHalf[8][1];
|
||||
__declspec(align(32)) VUINT32 sSign[8][1];
|
||||
__declspec(align(32)) VUINT32 sTopMask12[8][1];
|
||||
__declspec(align(32)) VUINT32 TinyRange[8][1];
|
||||
__declspec(align(32)) VUINT32 sLn2[8][1];
|
||||
} __svml_satanh_data_internal;
|
||||
#endif
|
||||
__svml_satanh_data_internal:
|
||||
/*== SgnMask ==*/
|
||||
.long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff
|
||||
/*== sOne = SP 1.0 ==*/
|
||||
.align 32
|
||||
.long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
|
||||
/*== sPoly[] = SP polynomial ==*/
|
||||
.align 32
|
||||
.long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */
|
||||
.long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */
|
||||
.long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */
|
||||
.long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */
|
||||
.long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */
|
||||
.long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */
|
||||
.long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */
|
||||
.long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */
|
||||
/*== iBrkValue = SP 2/3 ==*/
|
||||
.align 32
|
||||
.long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
|
||||
/*== iOffExpoMask = SP significand mask ==*/
|
||||
.align 32
|
||||
.long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
|
||||
/*== sHalf ==*/
|
||||
.align 32
|
||||
.long 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000
|
||||
/*== sSign ==*/
|
||||
.align 32
|
||||
.long 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000
|
||||
/*== sTopMask12 ==*/
|
||||
.align 32
|
||||
.long 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000
|
||||
/*== TinyRange ==*/
|
||||
.align 32
|
||||
.long 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000
|
||||
/*== sLn2 = SP ln(2) ==*/
|
||||
.align 32
|
||||
.long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218
|
||||
.align 32
|
||||
.type __svml_satanh_data_internal,@object
|
||||
.size __svml_satanh_data_internal,.-__svml_satanh_data_internal
|
||||
/* SgnMask */
|
||||
.long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff
|
||||
/* sOne = SP 1.0 */
|
||||
.align 32
|
||||
.long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
|
||||
/* sPoly[] = SP polynomial */
|
||||
.align 32
|
||||
.long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */
|
||||
.long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */
|
||||
.long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */
|
||||
.long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */
|
||||
.long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */
|
||||
.long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */
|
||||
.long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */
|
||||
.long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */
|
||||
/* iBrkValue = SP 2/3 */
|
||||
.align 32
|
||||
.long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
|
||||
/* iOffExpoMask = SP significand mask */
|
||||
.align 32
|
||||
.long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
|
||||
/* sHalf */
|
||||
.align 32
|
||||
.long 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000, 0x3F000000
|
||||
/* sSign */
|
||||
.align 32
|
||||
.long 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000
|
||||
/* sTopMask12 */
|
||||
.align 32
|
||||
.long 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000
|
||||
/* TinyRange */
|
||||
.align 32
|
||||
.long 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000, 0x0C000000
|
||||
/* sLn2 = SP ln(2) */
|
||||
.align 32
|
||||
.long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218
|
||||
.align 32
|
||||
.type __svml_satanh_data_internal, @object
|
||||
.size __svml_satanh_data_internal, .-__svml_satanh_data_internal
|
||||
|
||||
Loading…
Reference in New Issue
Block a user