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powerpc64le: add optimized strlen for P9
This started as a trivial change to Anton's rawmemchr. I got carried away. This is a hybrid between P8's asympotically faster 64B checks with extremely efficient small string checks e.g <64B (and sometimes a little bit more depending on alignment). The second trick is to align to 64B by running a 48B checking loop 16B at a time until we naturally align to 64B (i.e checking 48/96/144 bytes/iteration based on the alignment after the first 5 comparisons). This allieviates the need to check page boundaries. Finally, explicly use the P7 strlen with the runtime loader when building P9. We need to be cautious about vector/vsx extensions here on P9 only builds.
This commit is contained in:
Paul E. Murphy
parent
6ef4227509
commit
a23bd00f9d
1
sysdeps/powerpc/powerpc64/le/power9/rtld-strlen.S
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sysdeps/powerpc/powerpc64/le/power9/rtld-strlen.S
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#include <sysdeps/powerpc/powerpc64/power7/strlen.S>
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213
sysdeps/powerpc/powerpc64/le/power9/strlen.S
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213
sysdeps/powerpc/powerpc64/le/power9/strlen.S
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/* Optimized strlen implementation for PowerPC64/POWER9.
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Copyright (C) 2020 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#ifndef STRLEN
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# define STRLEN __strlen
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# define DEFINE_STRLEN_HIDDEN_DEF 1
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#endif
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/* Implements the function
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int [r3] strlen (const void *s [r3])
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The implementation can load bytes past a matching byte, but only
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up to the next 64B boundary, so it never crosses a page. */
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.machine power9
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ENTRY_TOCLESS (STRLEN, 4)
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CALL_MCOUNT 2
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vspltisb v18,0
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vspltisb v19,-1
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neg r5,r3
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rldicl r9,r5,0,60 /* How many bytes to get source 16B aligned? */
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/* Align data and fill bytes not loaded with non matching char. */
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lvx v0,0,r3
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lvsr v1,0,r3
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vperm v0,v19,v0,v1
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vcmpequb. v6,v0,v18
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beq cr6,L(aligned)
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vctzlsbb r3,v6
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blr
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/* Test 64B 16B at a time. The 64B vector loop is optimized for
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longer strings. Likewise, we check a multiple of 64B to avoid
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breaking the alignment calculation below. */
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L(aligned):
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add r4,r3,r9
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rldicl. r5,r4,60,62 /* Determine the number of 48B loops needed for
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alignment to 64B. And test for zero. */
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lxv v0+32,0(r4)
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vcmpequb. v6,v0,v18
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bne cr6,L(tail1)
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lxv v0+32,16(r4)
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vcmpequb. v6,v0,v18
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bne cr6,L(tail2)
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lxv v0+32,32(r4)
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vcmpequb. v6,v0,v18
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bne cr6,L(tail3)
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lxv v0+32,48(r4)
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vcmpequb. v6,v0,v18
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bne cr6,L(tail4)
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addi r4,r4,64
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/* Speculatively generate a fake 16B aligned address to generate the
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vector byte constant 0,1,..,15 using lvsl during reduction. */
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li r0,0
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/* Skip the alignment if already 64B aligned. */
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beq L(loop_64b)
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mtctr r5
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/* Test 48B per iteration until 64B aligned. */
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.p2align 5
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L(loop):
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lxv v0+32,0(r4)
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vcmpequb. v6,v0,v18
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bne cr6,L(tail1)
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lxv v0+32,16(r4)
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vcmpequb. v6,v0,v18
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bne cr6,L(tail2)
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lxv v0+32,32(r4)
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vcmpequb. v6,v0,v18
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bne cr6,L(tail3)
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addi r4,r4,48
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bdnz L(loop)
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.p2align 5
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L(loop_64b):
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lxv v1+32,0(r4) /* Load 4 quadwords. */
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lxv v2+32,16(r4)
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lxv v3+32,32(r4)
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lxv v4+32,48(r4)
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vminub v5,v1,v2 /* Compare and merge into one VR for speed. */
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vminub v6,v3,v4
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vminub v7,v5,v6
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vcmpequb. v7,v7,v18 /* Check for NULLs. */
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addi r4,r4,64 /* Adjust address for the next iteration. */
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bne cr6,L(vmx_zero)
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lxv v1+32,0(r4) /* Load 4 quadwords. */
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lxv v2+32,16(r4)
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lxv v3+32,32(r4)
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lxv v4+32,48(r4)
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vminub v5,v1,v2 /* Compare and merge into one VR for speed. */
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vminub v6,v3,v4
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vminub v7,v5,v6
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vcmpequb. v7,v7,v18 /* Check for NULLs. */
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addi r4,r4,64 /* Adjust address for the next iteration. */
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bne cr6,L(vmx_zero)
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lxv v1+32,0(r4) /* Load 4 quadwords. */
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lxv v2+32,16(r4)
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lxv v3+32,32(r4)
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lxv v4+32,48(r4)
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vminub v5,v1,v2 /* Compare and merge into one VR for speed. */
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vminub v6,v3,v4
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vminub v7,v5,v6
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vcmpequb. v7,v7,v18 /* Check for NULLs. */
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addi r4,r4,64 /* Adjust address for the next iteration. */
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beq cr6,L(loop_64b)
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L(vmx_zero):
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/* OK, we found a null byte. Let's look for it in the current 64-byte
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block and mark it in its corresponding VR. */
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vcmpequb v1,v1,v18
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vcmpequb v2,v2,v18
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vcmpequb v3,v3,v18
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vcmpequb v4,v4,v18
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/* We will now 'compress' the result into a single doubleword, so it
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can be moved to a GPR for the final calculation. First, we
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generate an appropriate mask for vbpermq, so we can permute bits into
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the first halfword. */
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vspltisb v10,3
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lvsl v11,0,r0
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vslb v10,v11,v10
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/* Permute the first bit of each byte into bits 48-63. */
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vbpermq v1,v1,v10
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vbpermq v2,v2,v10
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vbpermq v3,v3,v10
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vbpermq v4,v4,v10
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/* Shift each component into its correct position for merging. */
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vsldoi v2,v2,v2,2
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vsldoi v3,v3,v3,4
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vsldoi v4,v4,v4,6
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/* Merge the results and move to a GPR. */
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vor v1,v2,v1
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vor v2,v3,v4
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vor v4,v1,v2
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mfvrd r10,v4
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/* Adjust address to the begninning of the current 64-byte block. */
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addi r4,r4,-64
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cnttzd r0,r10 /* Count trailing zeros before the match. */
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subf r5,r3,r4
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add r3,r5,r0 /* Compute final length. */
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blr
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L(tail1):
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vctzlsbb r0,v6
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add r4,r4,r0
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subf r3,r3,r4
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blr
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L(tail2):
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vctzlsbb r0,v6
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add r4,r4,r0
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addi r4,r4,16
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subf r3,r3,r4
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blr
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L(tail3):
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vctzlsbb r0,v6
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add r4,r4,r0
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addi r4,r4,32
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subf r3,r3,r4
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blr
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L(tail4):
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vctzlsbb r0,v6
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add r4,r4,r0
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addi r4,r4,48
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subf r3,r3,r4
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blr
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END (STRLEN)
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#ifdef DEFINE_STRLEN_HIDDEN_DEF
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weak_alias (__strlen, strlen)
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libc_hidden_builtin_def (strlen)
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#endif
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@ -33,7 +33,7 @@ sysdep_routines += memcpy-power8-cached memcpy-power7 memcpy-a2 memcpy-power6 \
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ifneq (,$(filter %le,$(config-machine)))
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sysdep_routines += strcmp-power9 strncmp-power9 strcpy-power9 stpcpy-power9 \
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rawmemchr-power9
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rawmemchr-power9 strlen-power9
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endif
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CFLAGS-strncase-power7.c += -mcpu=power7 -funroll-loops
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CFLAGS-strncase_l-power7.c += -mcpu=power7 -funroll-loops
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@ -111,6 +111,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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/* Support sysdeps/powerpc/powerpc64/multiarch/strlen.c. */
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IFUNC_IMPL (i, name, strlen,
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#ifdef __LITTLE_ENDIAN__
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IFUNC_IMPL_ADD (array, i, strcpy, hwcap2 & PPC_FEATURE2_ARCH_3_00,
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__strlen_power9)
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#endif
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IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_2_07,
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__strlen_power8)
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IFUNC_IMPL_ADD (array, i, strlen, hwcap & PPC_FEATURE_HAS_VSX,
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2
sysdeps/powerpc/powerpc64/multiarch/strlen-power9.S
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2
sysdeps/powerpc/powerpc64/multiarch/strlen-power9.S
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#define STRLEN __strlen_power9
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#include <sysdeps/powerpc/powerpc64/le/power9/strlen.S>
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@ -30,8 +30,13 @@ extern __typeof (__redirect_strlen) __libc_strlen;
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extern __typeof (__redirect_strlen) __strlen_ppc attribute_hidden;
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extern __typeof (__redirect_strlen) __strlen_power7 attribute_hidden;
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extern __typeof (__redirect_strlen) __strlen_power8 attribute_hidden;
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extern __typeof (__redirect_strlen) __strlen_power9 attribute_hidden;
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libc_ifunc (__libc_strlen,
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# ifdef __LITTLE_ENDIAN__
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(hwcap2 & PPC_FEATURE2_ARCH_3_00)
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? __strlen_power9 :
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# endif
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(hwcap2 & PPC_FEATURE2_ARCH_2_07)
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? __strlen_power8 :
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(hwcap & PPC_FEATURE_HAS_VSX)
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