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Revert "TODO(audit): aarch64: morello: add _dl_runtime_profile entry"
This reverts commit 0c66b05c7f0b2ec5fdf7d37b4150ba517efa5df8.
This commit is contained in:
Szabolcs Nagy
parent
c5872cb18b
commit
a6e4d0bbd7
@ -28,7 +28,6 @@ typedef union
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} La_aarch64_vector;
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/* Registers for entry into PLT on AArch64. */
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#ifndef __CHERI_PURE_CAPABILITY__
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typedef struct La_aarch64_regs
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{
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uint64_t lr_xreg[9];
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@ -47,24 +46,6 @@ typedef struct La_aarch64_retval
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La_aarch64_vector lrv_vreg[8];
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void *lrv_vpcs;
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} La_aarch64_retval;
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#else
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typedef struct La_aarch64_regs
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{
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uintptr_t lr_xreg[9];
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La_aarch64_vector lr_vreg[8];
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uintptr_t lr_sp;
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uintptr_t lr_lr;
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void *lr_vpcs;
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} La_aarch64_regs;
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typedef struct La_aarch64_retval
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{
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uintptr_t lrv_xreg[8];
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La_aarch64_vector lrv_vreg[8];
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void *lrv_vpcs;
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} La_aarch64_retval;
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#endif
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__BEGIN_DECLS
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extern ElfW(Addr)
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@ -125,181 +125,10 @@ _dl_runtime_resolve:
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.align 2
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_dl_runtime_profile:
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/* Morello we get called with:
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ip0 &PLTGOT[2]
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ip1 temp(dl resolver entry point)
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[csp, #16] lr
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[csp, #0] &PLTGOT[n]
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Stack frame layout:
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[csp, #...] lr
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[csp, #...] &PLTGOT[n]
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[csp, #192] La_aarch64_regs
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[csp, #96] La_aarch64_retval
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[csp, #80] frame size return from pltenter
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[csp, #64] dl_profile_call saved c1
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[csp, #48] dl_profile_call saved c0
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[csp, #32] t1
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[csp, #0] c29, lr <- c29
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*/
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# define OFFSET_T1 32
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# define OFFSET_SAVED_CALL_X0 OFFSET_T1 + 16
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# define OFFSET_FS OFFSET_SAVED_CALL_X0 + 32
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# define OFFSET_RV OFFSET_FS + 16
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# define OFFSET_RG OFFSET_RV + DL_SIZEOF_RV
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# define SF_SIZE OFFSET_RG + DL_SIZEOF_RG
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# define OFFSET_PLTGOTN SF_SIZE
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# define OFFSET_LR OFFSET_PLTGOTN + 16
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/* Save arguments. */
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mov c11, csp
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sub x11, x11, #SF_SIZE
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scvalue csp, csp, x11
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cfi_adjust_cfa_offset (SF_SIZE)
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stp c29, c30, [csp, #0]
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mov c29, csp
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cfi_def_cfa_register (c29)
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cfi_rel_offset (c29, 0)
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cfi_rel_offset (lr, 8)
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stp c0, c1, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*0]
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cfi_rel_offset (c0, OFFSET_RG + DL_OFFSET_RG_X0 + 32*0 + 0)
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cfi_rel_offset (c1, OFFSET_RG + DL_OFFSET_RG_X0 + 32*0 + 16)
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stp c2, c3, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*1]
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cfi_rel_offset (c2, OFFSET_RG + DL_OFFSET_RG_X0 + 32*1 + 0)
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cfi_rel_offset (c3, OFFSET_RG + DL_OFFSET_RG_X0 + 32*1 + 16)
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stp c4, c5, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*2]
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cfi_rel_offset (c4, OFFSET_RG + DL_OFFSET_RG_X0 + 32*2 + 0)
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cfi_rel_offset (c5, OFFSET_RG + DL_OFFSET_RG_X0 + 32*2 + 16)
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stp c6, c7, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*3]
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cfi_rel_offset (c6, OFFSET_RG + DL_OFFSET_RG_X0 + 32*3 + 0)
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cfi_rel_offset (c7, OFFSET_RG + DL_OFFSET_RG_X0 + 32*3 + 16)
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stp q0, q1, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*0]
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cfi_rel_offset (q0, OFFSET_RG + DL_OFFSET_RG_V0 + 32*0)
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cfi_rel_offset (q1, OFFSET_RG + DL_OFFSET_RG_V0 + 32*0 + 16)
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stp q2, q3, [c29, #OFFSET_RG+ DL_OFFSET_RG_V0 + 32*1]
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cfi_rel_offset (q2, OFFSET_RG + DL_OFFSET_RG_V0 + 32*1 + 0)
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cfi_rel_offset (q3, OFFSET_RG + DL_OFFSET_RG_V0 + 32*1 + 16)
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stp q4, q5, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*2]
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cfi_rel_offset (q4, OFFSET_RG + DL_OFFSET_RG_V0 + 32*2 + 0)
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cfi_rel_offset (q5, OFFSET_RG + DL_OFFSET_RG_V0 + 32*2 + 16)
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stp q6, q7, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*3]
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cfi_rel_offset (q6, OFFSET_RG + DL_OFFSET_RG_V0 + 32*3 + 0)
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cfi_rel_offset (q7, OFFSET_RG + DL_OFFSET_RG_V0 + 32*3 + 16)
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add c0, c29, #SF_SIZE + 32
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ldr c1, [c29, #OFFSET_LR]
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stp c0, c1, [c29, #OFFSET_RG + DL_OFFSET_RG_SP]
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/* Get pointer to linker struct. */
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ldr c0, [ip0, #-PTR_SIZE]
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/* Prepare to call _dl_profile_fixup(). */
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ldr c1, [c29, OFFSET_PLTGOTN] /* Recover &PLTGOT[n] */
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mov c11, c1
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sub x1, x1, x16
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add x1, x1, x1, lsl #1
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lsl x1, x1, #3
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sub x1, x1, #(RELA_SIZE<<3)
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lsr x1, x1, #3
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scvalue c1, c11, x1
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stp c0, c1, [c29, #OFFSET_SAVED_CALL_X0]
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/* Set up extra args for _dl_profile_fixup */
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ldr c2, [c29, #OFFSET_LR] /* load saved LR */
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add c3, c29, #OFFSET_RG /* address of La_aarch64_reg */
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add c4, c29, #OFFSET_FS /* address of framesize */
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bl _dl_profile_fixup
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ldr ip0l, [c29, #OFFSET_FS] /* framesize == 0 */
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cmp x16, #0
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bge 1f
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cfi_remember_state
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/* Save the return. */
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mov ip0, c0
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/* Get arguments and return address back. */
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ldp c0, c1, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*0]
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ldp c2, c3, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*1]
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ldp c4, c5, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*2]
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ldp c6, c7, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*3]
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ldp q0, q1, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*0]
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ldp q2, q3, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*1]
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ldp q4, q5, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*2]
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ldp q6, q7, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*3]
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cfi_def_cfa_register (csp)
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ldp c29, c30, [c29, #0]
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cfi_restore(c29)
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cfi_restore(c30)
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add csp, csp, SF_SIZE + 16
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cfi_adjust_cfa_offset (- SF_SIZE - 32)
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/* Jump to the newly found address. */
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br ip0
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cfi_restore_state
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1:
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/* The new frame size is in ip0. */
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mov c11, c1
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sub x1, x29, x16
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and x12, x1, #0xfffffffffffffff0
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scvalue csp, csp, x12
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scvalue c1, c11, x1
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str c0, [c29, #OFFSET_T1]
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mov c0, csp
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add c1, c29, #SF_SIZE + 16
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mov c2, ip0
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bl memcpy
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ldr ip0, [c29, #OFFSET_T1]
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/* Call the function. */
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ldp c0, c1, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*0]
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ldp c2, c3, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*1]
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ldp c4, c5, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*2]
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ldp c6, c7, [c29, #OFFSET_RG + DL_OFFSET_RG_X0 + 32*3]
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ldp q0, q1, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*0]
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ldp q2, q3, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*1]
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ldp q4, q5, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*2]
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ldp q6, q7, [c29, #OFFSET_RG + DL_OFFSET_RG_V0 + 32*3]
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blr ip0
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stp c0, c1, [c29, #OFFSET_RV + DL_OFFSET_RV_X0]
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stp q0, q1, [c29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*0]
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stp q2, q3, [c29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*1]
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/* Setup call to pltexit */
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ldp c0, c1, [c29, #OFFSET_SAVED_CALL_X0]
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add c2, c29, #OFFSET_RG
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add c3, c29, #OFFSET_RV
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bl _dl_audit_pltexit
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ldp c0, c1, [c29, #OFFSET_RV + DL_OFFSET_RV_X0]
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ldp d0, d1, [c29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*0]
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ldp d2, d3, [c29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*1]
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/* LR from within La_aarch64_reg */
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ldr lr, [c29, #OFFSET_RG + DL_OFFSET_RG_LR]
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cfi_restore(lr)
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mov csp, c29
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cfi_def_cfa_register (csp)
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ldr c29, [c29, #0]
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cfi_restore(c29)
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add csp, csp, SF_SIZE + 32
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cfi_adjust_cfa_offset (- SF_SIZE - 32)
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br lr
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/* TODO: requires definition of La_aarch64_* layout
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and register state saved correctly for varargs ABI. */
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mov c0, 0
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ldr c0, [c0]
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cfi_endproc
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.size _dl_runtime_profile, .-_dl_runtime_profile
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