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Cleanup feenableexcept to use the same logic as the ARM version. No functional changes.

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This commit is contained in:
Wilco Dijkstra 2014-10-24 13:07:17 +00:00
parent 3a84f1a651
commit a7b00c1101
2 changed files with 6 additions and 6 deletions
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5
ChangeLog
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@ -1,3 +1,8 @@
2014-10-24 Wilco Dijkstra <wdijkstr@arm.com>
* sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept):
Simplify logic.
2014-10-24 Wilco Dijkstra <wdijkstr@arm.com> 2014-10-24 Wilco Dijkstra <wdijkstr@arm.com>
* sysdeps/aarch64/fpu/fedisblxcpt.c (fedisableexcept): * sysdeps/aarch64/fpu/fedisblxcpt.c (fedisableexcept):

7
sysdeps/aarch64/fpu/feenablxcpt.c
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@ -24,14 +24,9 @@ feenableexcept (int excepts)
{ {
fpu_control_t fpcr; fpu_control_t fpcr;
fpu_control_t fpcr_new; fpu_control_t fpcr_new;
int original_excepts;
_FPU_GETCW (fpcr); _FPU_GETCW (fpcr);
original_excepts = (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
excepts &= FE_ALL_EXCEPT; excepts &= FE_ALL_EXCEPT;
fpcr_new = fpcr | (excepts << FE_EXCEPT_SHIFT); fpcr_new = fpcr | (excepts << FE_EXCEPT_SHIFT);
if (fpcr != fpcr_new) if (fpcr != fpcr_new)
@ -50,5 +45,5 @@ feenableexcept (int excepts)
return -1; return -1;
} }
return original_excepts; return (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
} }