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Add inline syscall definitions.
(PSEUDO_LOADGP): Remove. (PSEUDO_PROLOGUE): Load GP in non-pic case. (SYSCALL_ERROR_LABEL): New. (PSEUDO): Use it in error branch. (PSEUDO_END): Add $syscall_error label.
This commit is contained in:
Ulrich Drepper
parent
411c121bce
commit
aaadd842d8
@ -58,9 +58,6 @@
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#undef END
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#define END(sym) .end sym
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/* Note that PSEUDO/PSEUDO_END use label number 1996---do not use a
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label of that number between those two macros! */
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#ifdef PROF
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# define PSEUDO_PROLOGUE \
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.frame sp, 0, ra; \
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@ -70,28 +67,38 @@
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jsr AT,(AT),_mcount; \
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.set at; \
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.prologue 1
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# define PSEUDO_LOADGP
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#else
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#elif defined PIC
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# define PSEUDO_PROLOGUE \
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.frame sp, 0, ra; \
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.prologue 0
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# define PSEUDO_LOADGP \
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br gp, 2f; \
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2: ldgp gp, 0(gp)
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#else
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# define PSEUDO_PROLOGUE \
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.frame sp, 0, ra; \
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ldgp gp,0(pv); \
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.prologue 1
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#endif /* PROF */
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#if RTLD_PRIVATE_ERRNO
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# define SYSCALL_ERROR_LABEL $syscall_error
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# define SYSCALL_ERROR_HANDLER \
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stl v0, errno(gp) !gprel; \
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lda v0, -1; \
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ret
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#elif defined(PIC)
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# define SYSCALL_ERROR_LABEL __syscall_error
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# define SYSCALL_ERROR_HANDLER \
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br $31, __syscall_error !samegp
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#else
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# define SYSCALL_ERROR_LABEL $syscall_error
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# define SYSCALL_ERROR_HANDLER \
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jmp $31, __syscall_error
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#endif /* RTLD_PRIVATE_ERRNO */
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#if defined(PIC) && !RTLD_PRIVATE_ERRNO
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# define PSEUDO(name, syscall_name, args) \
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/* Overridden by specific syscalls. */
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#undef PSEUDO_PREPARE_ARGS
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#define PSEUDO_PREPARE_ARGS /* Nothing. */
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#define PSEUDO(name, syscall_name, args) \
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.globl name; \
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.align 4; \
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.ent name,0; \
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@ -100,36 +107,232 @@ __LABEL(name) \
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PSEUDO_PREPARE_ARGS \
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lda v0, SYS_ify(syscall_name); \
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call_pal PAL_callsys; \
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bne a3, __syscall_error !samegp; \
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3:
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# undef PSEUDO_END
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bne a3, SYSCALL_ERROR_LABEL
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#undef PSEUDO_END
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#if defined(PIC) && !RTLD_PRIVATE_ERRNO
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# define PSEUDO_END(sym) END(sym)
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#else
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# define PSEUDO(name, syscall_name, args) \
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.globl name; \
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.align 4; \
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.ent name,0; \
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__LABEL(name) \
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PSEUDO_PREPARE_ARGS \
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lda v0, SYS_ify(syscall_name); \
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call_pal PAL_callsys; \
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bne a3, 1996f; \
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3:
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# undef PSEUDO_END
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# define PSEUDO_END(sym) \
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1996: \
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PSEUDO_LOADGP; \
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$syscall_error: \
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SYSCALL_ERROR_HANDLER; \
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END(sym)
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#endif /* PIC && !RTLD_PRIVATE_ERRNO */
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#undef PSEUDO_PREPARE_ARGS
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#define PSEUDO_PREPARE_ARGS /* Nothing. */
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#endif
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#define r0 v0
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#define r1 a4
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#define MOVE(x,y) mov x,y
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#else /* !ASSEMBLER */
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/* ??? Linux needs to be able to override INLINE_SYSCALL for one
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particular special case. Make this easy. */
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#define INLINE_SYSCALL(name, nr, args...) \
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INLINE_SYSCALL1(name, nr, args)
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#define INLINE_SYSCALL1(name, nr, args...) \
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({ \
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long _sc_ret, _sc_err; \
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inline_syscall##nr(name, args); \
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if (_sc_err) \
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{ \
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__set_errno (_sc_ret); \
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_sc_ret = -1L; \
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} \
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_sc_ret; \
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})
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#define INTERNAL_SYSCALL(name, err_out, nr, args...) \
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INTERNAL_SYSCALL1(name, err_out, nr, args)
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#define INTERNAL_SYSCALL1(name, err_out, nr, args...) \
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({ \
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long _sc_ret, _sc_err; \
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inline_syscall##nr(name, args); \
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err_out = _sc_err; \
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_sc_ret; \
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})
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#define INTERNAL_SYSCALL_DECL(err) long int err
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#define INTERNAL_SYSCALL_ERROR_P(val, err) err
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#define INTERNAL_SYSCALL_ERRNO(val, err) val
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#define inline_syscall_clobbers \
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"$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
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"$22", "$23", "$24", "$25", "$27", "$28", "memory"
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/* If TLS is in use, we have a conflict between the PAL_rduniq primitive,
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as modeled within GCC, and explicit use of the R0 register. If we use
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the register via the asm, the scheduler may place the PAL_rduniq insn
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before we've copied the data from R0 into _sc_ret. If this happens
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we'll get a reload abort, since R0 is live at the same time it is
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needed for the PAL_rduniq.
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Solve this by using the "v" constraint instead of an asm for the syscall
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output. We don't do this unconditionally to allow compilation with
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older compilers. */
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#ifdef USE_TLS
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#define inline_syscall_r0_asm
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#define inline_syscall_r0_out_constraint "=v"
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#else
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#define inline_syscall_r0_asm __asm__("$0")
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#define inline_syscall_r0_out_constraint "=r"
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#endif
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/* It is moderately important optimization-wise to limit the lifetime
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of the hard-register variables as much as possible. Thus we copy
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in/out as close to the asm as possible. */
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#define inline_syscall0(name, args...) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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__asm__("callsys # %0 %1 <= %2" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19) \
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: "0"(_sc_0) \
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: inline_syscall_clobbers, \
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"$16", "$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall1(name,arg1) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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__asm__("callsys # %0 %1 <= %2 %3" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16) \
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: "0"(_sc_0), "2"(_sc_16) \
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: inline_syscall_clobbers, \
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"$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall2(name,arg1,arg2) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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__asm__("callsys # %0 %1 <= %2 %3 %4" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17) \
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: inline_syscall_clobbers, \
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"$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall3(name,arg1,arg2,arg3) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18) \
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: inline_syscall_clobbers, "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall4(name,arg1,arg2,arg3,arg4) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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_sc_19 = (long) (arg4); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19) \
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: inline_syscall_clobbers, "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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register long _sc_20 __asm__("$20"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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_sc_19 = (long) (arg4); \
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_sc_20 = (long) (arg5); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18), "=r"(_sc_20) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19), "5"(_sc_20) \
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: inline_syscall_clobbers, "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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register long _sc_20 __asm__("$20"); \
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register long _sc_21 __asm__("$21"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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_sc_19 = (long) (arg4); \
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_sc_20 = (long) (arg5); \
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_sc_21 = (long) (arg6); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7 %8" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19) "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18), "=r"(_sc_20), "=r"(_sc_21) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19), "5"(_sc_20), \
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"6"(_sc_21) \
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: inline_syscall_clobbers); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#endif /* ASSEMBLER */
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