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mips: Fix store/load gp registers to/from ucontext_t
General purpose registers in mcontext_t structure are 8 bytes long for both MIPS32/MIPS64. get/set/make/swap context implementations for MIPS O32 incorrectly assume that general purpose registers in this structure are 4 bytes long. This patch is fixing that. Tested for MIPS O32 LE and BE. Compared objdump of modified functions for mips n32 and mips n64. [BZ #21548] * sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/Makefile: Include new test for mips o32. * sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c: Added new test for mips o32. * sysdeps/unix/sysv/linux/mips/setcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.
This commit is contained in:
Gordana Cmiljanovic
Joseph Myers
parent
c2528fef3b
commit
b309f058cf
14
ChangeLog
14
ChangeLog
@ -1,3 +1,17 @@
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2017-06-13 Gordana Cmiljanovic <gordana.cmiljanovic@imgtec.com>
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[BZ #21548]
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* sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as
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8 and use it when copying general purpose registers.
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* sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise.
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* sysdeps/unix/sysv/linux/mips/mips32/Makefile: Include new test for
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mips o32.
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* sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c: Added
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new test for mips o32.
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* sysdeps/unix/sysv/linux/mips/setcontext.S: Define MCONTEXT_SZGREG as
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8 and use it when copying general purpose registers.
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* sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.
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2017-06-13 Florian Weimer <fweimer@redhat.com>
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* configure.ac (find_cxx_header): Suppress compiler error message.
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@ -38,6 +38,12 @@ MASK = 0x10000000
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#endif
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FRAMESZ = ((LOCALSZ * SZREG) + ALSZ) & ALMASK
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GPOFF = FRAMESZ - (1 * SZREG)
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MCONTEXT_GREGSZ = 8
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#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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MCONTEXT_GREGOFF = 4
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#else
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MCONTEXT_GREGOFF = 0
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#endif
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NESTED (__getcontext, FRAMESZ, ra)
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.mask MASK, 0
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@ -74,23 +80,24 @@ NESTED (__getcontext, FRAMESZ, ra)
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/* Store a magic flag. */
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li v1, 1
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REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
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/* zero */
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REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
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REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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#endif
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REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S ra, MCONTEXT_PC(a0)
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REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
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#ifdef __mips_hard_float
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# if _MIPS_SIM == _ABI64
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@ -53,6 +53,12 @@ NARGREGS = 8
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A3OFF = FRAMESZ + (3 * SZREG) /* caller-allocated */
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NARGREGS = 4
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#endif
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MCONTEXT_GREGSZ = 8
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#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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MCONTEXT_GREGOFF = 4
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#else
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MCONTEXT_GREGOFF = 0
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#endif
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NESTED (__makecontext, FRAMESZ, ra)
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.mask MASK, -(ARGSZ * SZREG)
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@ -89,7 +95,8 @@ NESTED (__makecontext, FRAMESZ, ra)
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/* Store a magic flag. */
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li v1, 1
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REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
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/* zero */
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REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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/* Set up the stack. */
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PTR_L t0, STACK_SP(a0)
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@ -100,14 +107,14 @@ NESTED (__makecontext, FRAMESZ, ra)
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blez a2, 2f /* no arguments */
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/* Store register arguments. */
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PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * SZREG
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PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGOFF
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move t3, zero
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0:
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addiu t3, 1
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REG_L v1, (t1)
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PTR_ADDIU t1, SZREG
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REG_S v1, (t2)
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PTR_ADDIU t2, SZREG
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PTR_ADDIU t2, MCONTEXT_GREGSZ
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bgeu t3, a2, 2f /* all done */
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bltu t3, NARGREGS, 0b /* next */
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@ -138,13 +145,17 @@ NESTED (__makecontext, FRAMESZ, ra)
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#else
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PTR_LA t9, 99f
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#endif
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REG_S t0, (29 * SZREG + MCONTEXT_GREGS)(a0) /* sp */
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REG_S v1, (16 * SZREG + MCONTEXT_GREGS)(a0) /* s0 */
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/* sp */
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REG_S t0, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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/* s0 */
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REG_S v1, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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#ifdef __PIC__
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REG_S gp, (17 * SZREG + MCONTEXT_GREGS)(a0) /* s1 */
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/* s1 */
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REG_S gp, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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#endif
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REG_S t9, (31 * SZREG + MCONTEXT_GREGS)(a0) /* ra */
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REG_S a1, MCONTEXT_PC(a0)
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/* ra */
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REG_S t9, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S a1, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
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#ifdef __PIC__
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RESTORE_GP64_STACK
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@ -2,3 +2,7 @@ ifeq ($(subdir),conform)
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# For bugs 17786 and 21278.
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conformtest-xfail-conds += mips-o32-linux
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endif
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ifeq ($(subdir),stdlib)
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tests += bug-getcontext-mips-gp
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endif
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63
sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c
Normal file
63
sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c
Normal file
@ -0,0 +1,63 @@
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/* Tests register values retreived by getcontext() for mips o32.
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Copyright (C) 2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <ucontext.h>
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#if !defined __mips__ || _MIPS_SIM != _ABIO32
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# error "MIPS O32 specific test."
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#endif
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#define SP_REG 29
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static int
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do_test (void)
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{
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ucontext_t ctx;
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memset (&ctx, 0, sizeof (ctx));
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int status = getcontext (&ctx);
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if (status)
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{
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printf ("\ngetcontext() failed, errno: %d.\n", errno);
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return 1;
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}
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if (ctx.uc_mcontext.gregs[SP_REG] == 0
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|| ctx.uc_mcontext.gregs[SP_REG] > 0xffffffff)
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{
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printf ("\nError getcontext(): invalid $sp = 0x%llx.\n",
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ctx.uc_mcontext.gregs[SP_REG]);
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return 1;
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}
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if (ctx.uc_mcontext.pc == 0
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|| ctx.uc_mcontext.pc > 0xffffffff)
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{
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printf ("\nError getcontext(): invalid ctx.uc_mcontext.pc = 0x%llx.\n",
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ctx.uc_mcontext.pc);
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return 1;
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}
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return 0;
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}
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#include <support/test-driver.c>
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@ -47,6 +47,12 @@ A0OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
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#else
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A0OFF = FRAMESZ + (0 * SZREG) /* caller-allocated */
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#endif
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MCONTEXT_GREGSZ = 8
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#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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MCONTEXT_GREGOFF = 4
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#else
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MCONTEXT_GREGOFF = 0
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#endif
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NESTED (__setcontext, FRAMESZ, ra)
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.mask MASK, -(ARGSZ * SZREG)
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@ -73,7 +79,8 @@ NESTED (__setcontext, FRAMESZ, ra)
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/* Check for the magic flag. */
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li v0, 1
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REG_L v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
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/* zero */
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REG_L v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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bne v0, v1, 98f
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REG_S a0, A0OFF(sp)
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@ -117,32 +124,32 @@ NESTED (__setcontext, FRAMESZ, ra)
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/* Note the contents of argument registers will be random
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unless makecontext() has been called. */
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REG_L a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#if _MIPS_SIM != _ABIO32
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REG_L a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#endif
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REG_L s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
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REG_L gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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#endif
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REG_L sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L t9, MCONTEXT_PC(v0)
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REG_L sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
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REG_L t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
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move v0, zero
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jr t9
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@ -47,6 +47,12 @@ A1OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
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#else
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A1OFF = FRAMESZ + (1 * SZREG) /* caller-allocated */
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#endif
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MCONTEXT_GREGSZ = 8
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#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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MCONTEXT_GREGOFF = 4
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#else
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MCONTEXT_GREGOFF = 0
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#endif
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NESTED (__swapcontext, FRAMESZ, ra)
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.mask MASK, -(ARGSZ * SZREG)
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@ -83,23 +89,24 @@ NESTED (__swapcontext, FRAMESZ, ra)
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/* Store a magic flag. */
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li v1, 1
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REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
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/* zero */
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REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
|
||||
REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
|
||||
REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
|
||||
#endif
|
||||
REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
|
||||
REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
|
||||
REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
|
||||
REG_S ra, MCONTEXT_PC(a0)
|
||||
REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
|
||||
REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
|
||||
REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
|
||||
REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
|
||||
|
||||
#ifdef __mips_hard_float
|
||||
# if _MIPS_SIM == _ABI64
|
||||
@ -167,32 +174,32 @@ NESTED (__swapcontext, FRAMESZ, ra)
|
||||
|
||||
/* Note the contents of argument registers will be random
|
||||
unless makecontext() has been called. */
|
||||
REG_L a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
#if _MIPS_SIM != _ABIO32
|
||||
REG_L a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
#endif
|
||||
|
||||
REG_L s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
|
||||
REG_L gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
#endif
|
||||
REG_L sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
|
||||
REG_L t9, MCONTEXT_PC(v0)
|
||||
REG_L sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
|
||||
REG_L t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
|
||||
|
||||
move v0, zero
|
||||
jr t9
|
||||
|
||||
Loading…
Reference in New Issue
Block a user