AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-10 15:20:10 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add a minor 'cas' atomic optimization on sparc.

Browse Source 
* sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
	(__arch_compare_and_exchange_val_32_acq): Use %g0 as second
	argument of CAS if possible.
	* sysdeps/sparc/sparc64/bits/atomic.h
	(__arch_compare_and_exchange_val_32_acq): Likewise.
	(__arch_compare_and_exchange_val_64_acq): Likewise.
This commit is contained in:
David S. Miller 2013-01-23 11:27:24 -08:00
parent 67b3f58c83
commit bae8e7f5ed
3 changed files with 39 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
ChangeLog
View File

@ -1,3 +1,12 @@
2013-01-23 David S. Miller <davem@davemloft.net>
* sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
(__arch_compare_and_exchange_val_32_acq): Use %g0 as second
argument of CAS if possible.
* sysdeps/sparc/sparc64/bits/atomic.h
(__arch_compare_and_exchange_val_32_acq): Likewise.
(__arch_compare_and_exchange_val_64_acq): Likewise.
2013-01-23 Pino Toscano <toscano.pino@tiscali.it>
* sysdeps/unix/sysv/linux/ulimit.c: Moved to ...

14
sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
View File

@ -55,10 +55,16 @@ typedef uintmax_t uatomic_max_t;
({ \
__typeof (*(mem)) __acev_tmp; \
__typeof (mem) __acev_mem = (mem); \
__asm __volatile ("cas [%4], %2, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "r" (oldval), "m" (*__acev_mem), "r" (__acev_mem), \
"0" (newval) : "memory"); \
if (__builtin_constant_p (oldval) && (oldval) == 0) \
__asm __volatile ("cas [%3], %%g0, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "m" (*__acev_mem), "r" (__acev_mem), \
"0" (newval) : "memory"); \
else \
__asm __volatile ("cas [%4], %2, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "r" (oldval), "m" (*__acev_mem), "r" (__acev_mem), \
"0" (newval) : "memory"); \
__acev_tmp; })
/* This can be implemented if needed. */

28
sysdeps/sparc/sparc64/bits/atomic.h
View File

@ -55,20 +55,32 @@ typedef uintmax_t uatomic_max_t;
({ \
__typeof (*(mem)) __acev_tmp; \
__typeof (mem) __acev_mem = (mem); \
__asm __volatile ("cas [%4], %2, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "r" (oldval), "m" (*__acev_mem), "r" (__acev_mem), \
"0" (newval) : "memory"); \
if (__builtin_constant_p (oldval) && (oldval) == 0) \
__asm __volatile ("cas [%3], %%g0, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "m" (*__acev_mem), "r" (__acev_mem), \
"0" (newval) : "memory"); \
else \
__asm __volatile ("cas [%4], %2, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "r" (oldval), "m" (*__acev_mem), "r" (__acev_mem), \
"0" (newval) : "memory"); \
__acev_tmp; })
#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
({ \
__typeof (*(mem)) __acev_tmp; \
__typeof (mem) __acev_mem = (mem); \
__asm __volatile ("casx [%4], %2, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "r" ((long) (oldval)), "m" (*__acev_mem), \
"r" (__acev_mem), "0" ((long) (newval)) : "memory"); \
if (__builtin_constant_p (oldval) && (oldval) == 0) \
__asm __volatile ("casx [%3], %%g0, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "m" (*__acev_mem), "r" (__acev_mem), \
"0" ((long) (newval)) : "memory"); \
else \
__asm __volatile ("casx [%4], %2, %0" \
: "=r" (__acev_tmp), "=m" (*__acev_mem) \
: "r" ((long) (oldval)), "m" (*__acev_mem), \
"r" (__acev_mem), "0" ((long) (newval)) : "memory"); \
__acev_tmp; })
#define atomic_exchange_acq(mem, newvalue) \