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ARM_BX_ALIGN_LOG2
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@ -1,5 +1,9 @@
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2013-03-13 Roland McGrath <roland@hack.frob.com>
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* sysdeps/arm/arm-features.h (ARM_BX_ALIGN_LOG2): New macro.
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* sysdeps/arm/memcpy.S: Respect ARM_BX_ALIGN_LOG2.
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* sysdeps/arm/memmove.S: Likewise.
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* sysdeps/arm/add_n.S: Include <arm-features.h>.
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[ARM_ALWAYS_BX]: Don't pop into pc.
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@ -40,4 +40,17 @@
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that instructions using pc as a destination register must never be used,
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so a "bx" (or "blx") instruction is always required. */
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/* The log2 of the minimum alignment required for an address that
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is the target of a computed branch (i.e. a "bx" instruction).
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A more-specific arm-features.h file may define this to set a more
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stringent requirement.
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Using this only makes sense for code in ARM mode (where instructions
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always have a fixed size of four bytes), or for Thumb-mode code that is
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specifically aligning all the related branch targets to match (since
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Thumb instructions might be either two or four bytes). */
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#ifndef ARM_BX_ALIGN_LOG2
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# define ARM_BX_ALIGN_LOG2 2
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#endif
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#endif /* arm-features.h */
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@ -91,9 +91,9 @@ ENTRY(memcpy)
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CALGN( adr r4, 6f )
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CALGN( subs r2, r2, r3 ) @ C gets set
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#ifndef ARM_ALWAYS_BX
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CALGN( add pc, r4, ip )
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CALGN( add pc, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
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#else
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CALGN( add r4, r4, ip )
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CALGN( add r4, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
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CALGN( bx r4 )
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#endif
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@ -115,39 +115,56 @@ ENTRY(memcpy)
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5: ands ip, r2, #28
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rsb ip, ip, #32
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#ifndef ARM_ALWAYS_BX
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addne pc, pc, ip @ C is always clear here
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/* C is always clear here. */
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addne pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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b 7f
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#else
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beq 7f
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push {r10}
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cfi_adjust_cfa_offset (4)
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cfi_rel_offset (r10, 0)
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add r10, pc, ip
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add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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bx r10
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#endif
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.p2align ARM_BX_ALIGN_LOG2
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6: nop
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.p2align ARM_BX_ALIGN_LOG2
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ldr r3, [r1], #4
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.p2align ARM_BX_ALIGN_LOG2
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ldr r4, [r1], #4
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.p2align ARM_BX_ALIGN_LOG2
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ldr r5, [r1], #4
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.p2align ARM_BX_ALIGN_LOG2
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ldr r6, [r1], #4
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.p2align ARM_BX_ALIGN_LOG2
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ldr r7, [r1], #4
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.p2align ARM_BX_ALIGN_LOG2
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ldr r8, [r1], #4
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.p2align ARM_BX_ALIGN_LOG2
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ldr lr, [r1], #4
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#ifndef ARM_ALWAYS_BX
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add pc, pc, ip
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add pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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nop
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#else
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add r10, pc, ip
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add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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bx r10
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#endif
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.p2align ARM_BX_ALIGN_LOG2
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nop
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.p2align ARM_BX_ALIGN_LOG2
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str r3, [r0], #4
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.p2align ARM_BX_ALIGN_LOG2
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str r4, [r0], #4
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.p2align ARM_BX_ALIGN_LOG2
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str r5, [r0], #4
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.p2align ARM_BX_ALIGN_LOG2
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str r6, [r0], #4
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.p2align ARM_BX_ALIGN_LOG2
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str r7, [r0], #4
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.p2align ARM_BX_ALIGN_LOG2
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str r8, [r0], #4
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.p2align ARM_BX_ALIGN_LOG2
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str lr, [r0], #4
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#ifdef ARM_ALWAYS_BX
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@ -107,9 +107,9 @@ ENTRY(memmove)
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CALGN( adr r4, 6f )
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CALGN( subs r2, r2, ip ) @ C is set here
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#ifndef ARM_ALWAYS_BX
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CALGN( add pc, r4, ip )
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CALGN( add pc, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
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#else
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CALGN( add r4, r4, ip )
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CALGN( add r4, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
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CALGN( bx r4 )
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#endif
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@ -131,39 +131,56 @@ ENTRY(memmove)
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5: ands ip, r2, #28
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rsb ip, ip, #32
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#ifndef ARM_ALWAYS_BX
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addne pc, pc, ip @ C is always clear here
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/* C is always clear here. */
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addne pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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b 7f
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#else
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beq 7f
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push {r10}
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cfi_adjust_cfa_offset (4)
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cfi_rel_offset (r10, 0)
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add r10, pc, ip
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add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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bx r10
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#endif
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.p2align ARM_BX_ALIGN_LOG2
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6: nop
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.p2align ARM_BX_ALIGN_LOG2
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ldr r3, [r1, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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ldr r4, [r1, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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ldr r5, [r1, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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ldr r6, [r1, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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ldr r7, [r1, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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ldr r8, [r1, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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ldr lr, [r1, #-4]!
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#ifndef ARM_ALWAYS_BX
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add pc, pc, ip
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add pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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nop
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#else
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add r10, pc, ip
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add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
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bx r10
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#endif
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.p2align ARM_BX_ALIGN_LOG2
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nop
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.p2align ARM_BX_ALIGN_LOG2
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str r3, [r0, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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str r4, [r0, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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str r5, [r0, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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str r6, [r0, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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str r7, [r0, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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str r8, [r0, #-4]!
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.p2align ARM_BX_ALIGN_LOG2
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str lr, [r0, #-4]!
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#ifdef ARM_ALWAYS_BX
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