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elf: Remove Intel MPX support (lazy PLT, ld.so profile, and LD_AUDIT)

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Intel MPX failed to gain wide adoption and has been deprecated for a
while. GCC 9.1 removed Intel MPX support. Linux kernel removed MPX in
2019.

This patch removes the support code from the dynamic loader.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
This commit is contained in:
Fangrui Song 2021-10-11 11:14:02 -07:00
parent eb73b87897
commit bf433b849a
12 changed files with 7 additions and 186 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
NEWS
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@ -61,6 +61,8 @@ Deprecated and removed features, and other changes affecting compatibility:
when audit modules or dlmopen are used. when audit modules or dlmopen are used.
* Intel MPX support (lazy PLT, ld.so profile, and LD_AUDIT) has been removed.
Changes to build and runtime requirements: Changes to build and runtime requirements:
[Add changes to build and runtime requirements here] [Add changes to build and runtime requirements here]

3
config.h.in
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@ -84,9 +84,6 @@
/* Define if assembler supports arch13 instructions on S390. */ /* Define if assembler supports arch13 instructions on S390. */
#undef HAVE_S390_ARCH13_ASM_SUPPORT #undef HAVE_S390_ARCH13_ASM_SUPPORT
/* Define if assembler supports Intel MPX. */
#undef HAVE_MPX_SUPPORT
/* Define if the compiler\'s exception support is based on libunwind. */ /* Define if the compiler\'s exception support is based on libunwind. */
#undef HAVE_CC_WITH_LIBUNWIND #undef HAVE_CC_WITH_LIBUNWIND

27
sysdeps/i386/configure vendored
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@ -83,33 +83,6 @@ $as_echo "$libc_cv_ld_static_pie" >&6; }
fi fi
fi fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for Intel MPX support" >&5
$as_echo_n "checking for Intel MPX support... " >&6; }
if ${libc_cv_asm_mpx+:} false; then :
$as_echo_n "(cached) " >&6
else
cat > conftest.s <<\EOF
bndmov %bnd0,(%esp)
EOF
if { ac_try='${CC-cc} -c $ASFLAGS conftest.s 1>&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }; then
libc_cv_asm_mpx=yes
else
libc_cv_asm_mpx=no
fi
rm -f conftest*
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_mpx" >&5
$as_echo "$libc_cv_asm_mpx" >&6; }
if test $libc_cv_asm_mpx = yes; then
$as_echo "#define HAVE_MPX_SUPPORT 1" >>confdefs.h
fi
$as_echo "#define PI_STATIC_AND_HIDDEN 1" >>confdefs.h $as_echo "#define PI_STATIC_AND_HIDDEN 1" >>confdefs.h

15
sysdeps/i386/configure.ac
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@ -53,21 +53,6 @@ rm -f conftest*])
fi fi
fi fi
dnl Check whether asm supports Intel MPX
AC_CACHE_CHECK(for Intel MPX support, libc_cv_asm_mpx, [dnl
cat > conftest.s <<\EOF
bndmov %bnd0,(%esp)
EOF
if AC_TRY_COMMAND(${CC-cc} -c $ASFLAGS conftest.s 1>&AS_MESSAGE_LOG_FD); then
libc_cv_asm_mpx=yes
else
libc_cv_asm_mpx=no
fi
rm -f conftest*])
if test $libc_cv_asm_mpx = yes; then
AC_DEFINE(HAVE_MPX_SUPPORT)
fi
dnl It is always possible to access static and hidden symbols in an dnl It is always possible to access static and hidden symbols in an
dnl position independent way. dnl position independent way.
AC_DEFINE(PI_STATIC_AND_HIDDEN) AC_DEFINE(PI_STATIC_AND_HIDDEN)

21
sysdeps/i386/dl-trampoline.S
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@ -19,12 +19,6 @@
#include <sysdep.h> #include <sysdep.h>
#include <link-defines.h> #include <link-defines.h>
#ifdef HAVE_MPX_SUPPORT
# define PRESERVE_BND_REGS_PREFIX bnd
#else
# define PRESERVE_BND_REGS_PREFIX .byte 0xf2
#endif
.text .text
.globl _dl_runtime_resolve .globl _dl_runtime_resolve
.type _dl_runtime_resolve, @function .type _dl_runtime_resolve, @function
@ -250,13 +244,6 @@ _dl_runtime_profile:
movl %edx, LRV_EDX_OFFSET(%esp) movl %edx, LRV_EDX_OFFSET(%esp)
fstpt LRV_ST0_OFFSET(%esp) fstpt LRV_ST0_OFFSET(%esp)
fstpt LRV_ST1_OFFSET(%esp) fstpt LRV_ST1_OFFSET(%esp)
#ifdef HAVE_MPX_SUPPORT
bndmov %bnd0, LRV_BND0_OFFSET(%esp)
bndmov %bnd1, LRV_BND1_OFFSET(%esp)
#else
.byte 0x66,0x0f,0x1b,0x44,0x24,LRV_BND0_OFFSET
.byte 0x66,0x0f,0x1b,0x4c,0x24,LRV_BND1_OFFSET
#endif
pushl %esp pushl %esp
cfi_adjust_cfa_offset (4) cfi_adjust_cfa_offset (4)
# Address of La_i86_regs area. # Address of La_i86_regs area.
@ -270,17 +257,9 @@ _dl_runtime_profile:
movl LRV_EDX_OFFSET(%esp), %edx movl LRV_EDX_OFFSET(%esp), %edx
fldt LRV_ST1_OFFSET(%esp) fldt LRV_ST1_OFFSET(%esp)
fldt LRV_ST0_OFFSET(%esp) fldt LRV_ST0_OFFSET(%esp)
#ifdef HAVE_MPX_SUPPORT
bndmov LRV_BND0_OFFSET(%esp), %bnd0
bndmov LRV_BND1_OFFSET(%esp), %bnd1
#else
.byte 0x66,0x0f,0x1a,0x44,0x24,LRV_BND0_OFFSET
.byte 0x66,0x0f,0x1a,0x4c,0x24,LRV_BND1_OFFSET
#endif
# Restore stack before return. # Restore stack before return.
addl $(LRV_SIZE + 4 + LR_SIZE + 4), %esp addl $(LRV_SIZE + 4 + LR_SIZE + 4), %esp
cfi_adjust_cfa_offset (-(LRV_SIZE + 4 + LR_SIZE + 4)) cfi_adjust_cfa_offset (-(LRV_SIZE + 4 + LR_SIZE + 4))
PRESERVE_BND_REGS_PREFIX
ret ret
cfi_endproc cfi_endproc
.size _dl_runtime_profile, .-_dl_runtime_profile .size _dl_runtime_profile, .-_dl_runtime_profile

2
sysdeps/i386/link-defines.sym
View File

@ -16,5 +16,3 @@ LRV_EAX_OFFSET offsetof (struct La_i86_retval, lrv_eax)
LRV_EDX_OFFSET offsetof (struct La_i86_retval, lrv_edx) LRV_EDX_OFFSET offsetof (struct La_i86_retval, lrv_edx)
LRV_ST0_OFFSET offsetof (struct La_i86_retval, lrv_st0) LRV_ST0_OFFSET offsetof (struct La_i86_retval, lrv_st0)
LRV_ST1_OFFSET offsetof (struct La_i86_retval, lrv_st1) LRV_ST1_OFFSET offsetof (struct La_i86_retval, lrv_st1)
LRV_BND0_OFFSET offsetof (struct La_i86_retval, lrv_bnd0)
LRV_BND1_OFFSET offsetof (struct La_i86_retval, lrv_bnd1)

10
sysdeps/x86/bits/link.h
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@ -38,8 +38,8 @@ typedef struct La_i86_retval
uint32_t lrv_edx; uint32_t lrv_edx;
long double lrv_st0; long double lrv_st0;
long double lrv_st1; long double lrv_st1;
uint64_t lrv_bnd0; uint64_t __glibc_unused1;
uint64_t lrv_bnd1; uint64_t __glibc_unused2;
} La_i86_retval; } La_i86_retval;
@ -96,7 +96,7 @@ typedef struct La_x86_64_regs
La_x86_64_xmm lr_xmm[8]; La_x86_64_xmm lr_xmm[8];
La_x86_64_vector lr_vector[8]; La_x86_64_vector lr_vector[8];
#ifndef __ILP32__ #ifndef __ILP32__
__int128_t lr_bnd[4]; __int128_t __glibc_unused1[4];
#endif #endif
} La_x86_64_regs; } La_x86_64_regs;
@ -112,8 +112,8 @@ typedef struct La_x86_64_retval
La_x86_64_vector lrv_vector0; La_x86_64_vector lrv_vector0;
La_x86_64_vector lrv_vector1; La_x86_64_vector lrv_vector1;
#ifndef __ILP32__ #ifndef __ILP32__
__int128_t lrv_bnd0; __int128_t __glibc_unused1;
__int128_t lrv_bnd1; __int128_t __glibc_unused2;
#endif #endif
} La_x86_64_retval; } La_x86_64_retval;

27
sysdeps/x86_64/configure vendored
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@ -23,33 +23,6 @@ $as_echo "$libc_cv_cc_mprefer_vector_width" >&6; }
config_vars="$config_vars config_vars="$config_vars
config-cflags-mprefer-vector-width = $libc_cv_cc_mprefer_vector_width" config-cflags-mprefer-vector-width = $libc_cv_cc_mprefer_vector_width"
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for Intel MPX support" >&5
$as_echo_n "checking for Intel MPX support... " >&6; }
if ${libc_cv_asm_mpx+:} false; then :
$as_echo_n "(cached) " >&6
else
cat > conftest.s <<\EOF
bndmov %bnd0,(%rsp)
EOF
if { ac_try='${CC-cc} -c $ASFLAGS conftest.s 1>&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }; then
libc_cv_asm_mpx=yes
else
libc_cv_asm_mpx=no
fi
rm -f conftest*
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_mpx" >&5
$as_echo "$libc_cv_asm_mpx" >&6; }
if test $libc_cv_asm_mpx = yes; then
$as_echo "#define HAVE_MPX_SUPPORT 1" >>confdefs.h
fi
if test x"$build_mathvec" = xnotset; then if test x"$build_mathvec" = xnotset; then
build_mathvec=yes build_mathvec=yes
fi fi

15
sysdeps/x86_64/configure.ac
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@ -10,21 +10,6 @@ LIBC_TRY_CC_OPTION([-mprefer-vector-width=128],
LIBC_CONFIG_VAR([config-cflags-mprefer-vector-width], LIBC_CONFIG_VAR([config-cflags-mprefer-vector-width],
[$libc_cv_cc_mprefer_vector_width]) [$libc_cv_cc_mprefer_vector_width])
dnl Check whether asm supports Intel MPX
AC_CACHE_CHECK(for Intel MPX support, libc_cv_asm_mpx, [dnl
cat > conftest.s <<\EOF
bndmov %bnd0,(%rsp)
EOF
if AC_TRY_COMMAND(${CC-cc} -c $ASFLAGS conftest.s 1>&AS_MESSAGE_LOG_FD); then
libc_cv_asm_mpx=yes
else
libc_cv_asm_mpx=no
fi
rm -f conftest*])
if test $libc_cv_asm_mpx = yes; then
AC_DEFINE(HAVE_MPX_SUPPORT)
fi
if test x"$build_mathvec" = xnotset; then if test x"$build_mathvec" = xnotset; then
build_mathvec=yes build_mathvec=yes
fi fi

9
sysdeps/x86_64/dl-trampoline.S
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@ -42,15 +42,6 @@
/* Area on stack to save and restore registers used for parameter /* Area on stack to save and restore registers used for parameter
passing when calling _dl_fixup. */ passing when calling _dl_fixup. */
#ifdef __ILP32__
# define PRESERVE_BND_REGS_PREFIX
#else
# ifdef HAVE_MPX_SUPPORT
# define PRESERVE_BND_REGS_PREFIX bnd
# else
# define PRESERVE_BND_REGS_PREFIX .byte 0xf2
# endif
#endif
#define REGISTER_SAVE_RAX 0 #define REGISTER_SAVE_RAX 0
#define REGISTER_SAVE_RCX (REGISTER_SAVE_RAX + 8) #define REGISTER_SAVE_RCX (REGISTER_SAVE_RAX + 8)
#define REGISTER_SAVE_RDX (REGISTER_SAVE_RCX + 8) #define REGISTER_SAVE_RDX (REGISTER_SAVE_RCX + 8)

54
sysdeps/x86_64/dl-trampoline.h
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@ -149,8 +149,6 @@ _dl_runtime_resolve:
# Adjust stack(PLT did 2 pushes) # Adjust stack(PLT did 2 pushes)
add $(LOCAL_STORAGE_AREA + 16), %RSP_LP add $(LOCAL_STORAGE_AREA + 16), %RSP_LP
cfi_adjust_cfa_offset(-(LOCAL_STORAGE_AREA + 16)) cfi_adjust_cfa_offset(-(LOCAL_STORAGE_AREA + 16))
# Preserve bound registers.
PRESERVE_BND_REGS_PREFIX
jmp *%r11 # Jump to function address. jmp *%r11 # Jump to function address.
cfi_endproc cfi_endproc
.size _dl_runtime_resolve, .-_dl_runtime_resolve .size _dl_runtime_resolve, .-_dl_runtime_resolve
@ -230,20 +228,6 @@ _dl_runtime_profile:
movaps %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp) movaps %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp)
movaps %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp) movaps %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
# ifndef __ILP32__
# ifdef HAVE_MPX_SUPPORT
bndmov %bnd0, (LR_BND_OFFSET)(%rsp) # Preserve bound
bndmov %bnd1, (LR_BND_OFFSET + BND_SIZE)(%rsp) # registers. Nops if
bndmov %bnd2, (LR_BND_OFFSET + BND_SIZE*2)(%rsp) # MPX not available
bndmov %bnd3, (LR_BND_OFFSET + BND_SIZE*3)(%rsp) # or disabled.
# else
.byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET)
.byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
.byte 0x66,0x0f,0x1b,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
.byte 0x66,0x0f,0x1b,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
# endif
# endif
# ifdef RESTORE_AVX # ifdef RESTORE_AVX
/* This is to support AVX audit modules. */ /* This is to support AVX audit modules. */
VMOVA %VEC(0), (LR_VECTOR_OFFSET)(%rsp) VMOVA %VEC(0), (LR_VECTOR_OFFSET)(%rsp)
@ -366,25 +350,10 @@ _dl_runtime_profile:
vmovdqa %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp) vmovdqa %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
1: 1:
# endif
# ifndef __ILP32__
# ifdef HAVE_MPX_SUPPORT
bndmov (LR_BND_OFFSET)(%rsp), %bnd0 # Restore bound
bndmov (LR_BND_OFFSET + BND_SIZE)(%rsp), %bnd1 # registers.
bndmov (LR_BND_OFFSET + BND_SIZE*2)(%rsp), %bnd2
bndmov (LR_BND_OFFSET + BND_SIZE*3)(%rsp), %bnd3
# else
.byte 0x66,0x0f,0x1a,0x84,0x24;.long (LR_BND_OFFSET)
.byte 0x66,0x0f,0x1a,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
.byte 0x66,0x0f,0x1a,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
.byte 0x66,0x0f,0x1a,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
# endif
# endif # endif
mov 16(%rbx), %R10_LP # Anything in framesize? mov 16(%rbx), %R10_LP # Anything in framesize?
test %R10_LP, %R10_LP test %R10_LP, %R10_LP
PRESERVE_BND_REGS_PREFIX
jns 3f jns 3f
/* There's nothing in the frame size, so there /* There's nothing in the frame size, so there
@ -403,7 +372,6 @@ _dl_runtime_profile:
add $48, %RSP_LP # Adjust the stack to the return value add $48, %RSP_LP # Adjust the stack to the return value
# (eats the reloc index and link_map) # (eats the reloc index and link_map)
cfi_adjust_cfa_offset(-48) cfi_adjust_cfa_offset(-48)
PRESERVE_BND_REGS_PREFIX
jmp *%r11 # Jump to function address. jmp *%r11 # Jump to function address.
3: 3:
@ -430,7 +398,6 @@ _dl_runtime_profile:
movq 32(%rdi), %rsi movq 32(%rdi), %rsi
movq 40(%rdi), %rdi movq 40(%rdi), %rdi
PRESERVE_BND_REGS_PREFIX
call *%r11 call *%r11
mov 24(%rbx), %RSP_LP # Drop the copied stack content mov 24(%rbx), %RSP_LP # Drop the copied stack content
@ -475,16 +442,6 @@ _dl_runtime_profile:
vmovdqa %xmm1, (LRV_SIZE + XMM_SIZE)(%rcx) vmovdqa %xmm1, (LRV_SIZE + XMM_SIZE)(%rcx)
# endif # endif
# ifndef __ILP32__
# ifdef HAVE_MPX_SUPPORT
bndmov %bnd0, LRV_BND0_OFFSET(%rcx) # Preserve returned bounds.
bndmov %bnd1, LRV_BND1_OFFSET(%rcx)
# else
.byte 0x66,0x0f,0x1b,0x81;.long (LRV_BND0_OFFSET)
.byte 0x66,0x0f,0x1b,0x89;.long (LRV_BND1_OFFSET)
# endif
# endif
fstpt LRV_ST0_OFFSET(%rcx) fstpt LRV_ST0_OFFSET(%rcx)
fstpt LRV_ST1_OFFSET(%rcx) fstpt LRV_ST1_OFFSET(%rcx)
@ -515,16 +472,6 @@ _dl_runtime_profile:
VMOVA LRV_VECTOR1_OFFSET(%rsp), %VEC(1) VMOVA LRV_VECTOR1_OFFSET(%rsp), %VEC(1)
1: 1:
# endif
# ifndef __ILP32__
# ifdef HAVE_MPX_SUPPORT
bndmov LRV_BND0_OFFSET(%rsp), %bnd0 # Restore bound registers.
bndmov LRV_BND1_OFFSET(%rsp), %bnd1
# else
.byte 0x66,0x0f,0x1a,0x84,0x24;.long (LRV_BND0_OFFSET)
.byte 0x66,0x0f,0x1a,0x8c,0x24;.long (LRV_BND1_OFFSET)
# endif
# endif # endif
fldt LRV_ST1_OFFSET(%rsp) fldt LRV_ST1_OFFSET(%rsp)
@ -538,7 +485,6 @@ _dl_runtime_profile:
add $48, %RSP_LP # Adjust the stack to the return value add $48, %RSP_LP # Adjust the stack to the return value
# (eats the reloc index and link_map) # (eats the reloc index and link_map)
cfi_adjust_cfa_offset(-48) cfi_adjust_cfa_offset(-48)
PRESERVE_BND_REGS_PREFIX
retq retq
cfi_endproc cfi_endproc

8
sysdeps/x86_64/link-defines.sym
View File

@ -6,7 +6,6 @@ VECTOR_SIZE sizeof (La_x86_64_vector)
XMM_SIZE sizeof (La_x86_64_xmm) XMM_SIZE sizeof (La_x86_64_xmm)
YMM_SIZE sizeof (La_x86_64_ymm) YMM_SIZE sizeof (La_x86_64_ymm)
ZMM_SIZE sizeof (La_x86_64_zmm) ZMM_SIZE sizeof (La_x86_64_zmm)
BND_SIZE sizeof (__int128_t)
LR_SIZE sizeof (struct La_x86_64_regs) LR_SIZE sizeof (struct La_x86_64_regs)
LR_RDX_OFFSET offsetof (struct La_x86_64_regs, lr_rdx) LR_RDX_OFFSET offsetof (struct La_x86_64_regs, lr_rdx)
@ -19,9 +18,6 @@ LR_RBP_OFFSET offsetof (struct La_x86_64_regs, lr_rbp)
LR_RSP_OFFSET offsetof (struct La_x86_64_regs, lr_rsp) LR_RSP_OFFSET offsetof (struct La_x86_64_regs, lr_rsp)
LR_XMM_OFFSET offsetof (struct La_x86_64_regs, lr_xmm) LR_XMM_OFFSET offsetof (struct La_x86_64_regs, lr_xmm)
LR_VECTOR_OFFSET offsetof (struct La_x86_64_regs, lr_vector) LR_VECTOR_OFFSET offsetof (struct La_x86_64_regs, lr_vector)
#ifndef __ILP32__
LR_BND_OFFSET offsetof (struct La_x86_64_regs, lr_bnd)
#endif
LRV_SIZE sizeof (struct La_x86_64_retval) LRV_SIZE sizeof (struct La_x86_64_retval)
LRV_RAX_OFFSET offsetof (struct La_x86_64_retval, lrv_rax) LRV_RAX_OFFSET offsetof (struct La_x86_64_retval, lrv_rax)
@ -32,7 +28,3 @@ LRV_ST0_OFFSET offsetof (struct La_x86_64_retval, lrv_st0)
LRV_ST1_OFFSET offsetof (struct La_x86_64_retval, lrv_st1) LRV_ST1_OFFSET offsetof (struct La_x86_64_retval, lrv_st1)
LRV_VECTOR0_OFFSET offsetof (struct La_x86_64_retval, lrv_vector0) LRV_VECTOR0_OFFSET offsetof (struct La_x86_64_retval, lrv_vector0)
LRV_VECTOR1_OFFSET offsetof (struct La_x86_64_retval, lrv_vector1) LRV_VECTOR1_OFFSET offsetof (struct La_x86_64_retval, lrv_vector1)
#ifndef __ILP32__
LRV_BND0_OFFSET offsetof (struct La_x86_64_retval, lrv_bnd0)
LRV_BND1_OFFSET offsetof (struct La_x86_64_retval, lrv_bnd1)
#endif