AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-22 13:00:06 +00:00
Code Issues Packages Projects Releases Wiki Activity

powerpc: Fix typos and field name in comments

Browse Source 
Fix a couple of typos and v_regs field name in mcontext_t.

	* sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h: Fix typos and
	field name in mcontext_t struct.

Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
This commit is contained in:
Gustavo Romero 2019-08-12 23:40:30 -04:00 committed by Tulio Magno Quites Machado Filho
parent 42f527c89d
commit c8c8160cee
2 changed files with 9 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
ChangeLog
View File

@ -1,3 +1,8 @@
2019-08-22 Gustavo Romero <gromero@linux.vnet.ibm.com>
* sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h: Fix typos and
field name in mcontext_t struct.
2019-08-22 Joseph Myers <joseph@codesourcery.com> 2019-08-22 Joseph Myers <joseph@codesourcery.com>
* resolv/tst-resolv-ai_idn-latin1.c (do_test): Mark test * resolv/tst-resolv-ai_idn-latin1.c (do_test): Mark test

8
sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h
View File

@ -75,12 +75,12 @@ typedef struct
* a sigcontext. For older kernel (without Altivec) the sigcontext matches * a sigcontext. For older kernel (without Altivec) the sigcontext matches
* the mcontext upto but not including the v_regs field. For kernels that * the mcontext upto but not including the v_regs field. For kernels that
* don't set AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the * don't set AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the
* v_regs field may not exist and should not be referenced. The v_regd field * v_regs field may not exist and should not be referenced. The v_regs field
* can be refernced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC * can be referenced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC
* is set in AT_HWCAP. */ * is set in AT_HWCAP. */
/* Number of general registers. */ /* Number of general registers. */
# define __NGREG 48 /* includes r0-r31, nip, msr, lr, etc. */ # define __NGREG 48 /* includes r0-r31, nip, msr, lr, etc. */
# define __NFPREG 33 /* includes fp0-fp31 &fpscr. */ # define __NFPREG 33 /* includes fp0-fp31 &fpscr. */
# define __NVRREG 34 /* includes v0-v31, vscr, & vrsave in # define __NVRREG 34 /* includes v0-v31, vscr, & vrsave in
split vectors */ split vectors */
@ -136,7 +136,7 @@ typedef struct {
* either NULL (if this processor does not support the VMX feature) or the * either NULL (if this processor does not support the VMX feature) or the
* address of the first quadword within the allocated (vmx_reserve) area. * address of the first quadword within the allocated (vmx_reserve) area.
* *
* The pointer (v_regs) of vector type (elf_vrreg_t) is essentually * The pointer (v_regs) of vector type (elf_vrreg_t) is essentially
* an array of 34 quadword entries. The entries with * an array of 34 quadword entries. The entries with
* indexes 0-31 contain the corresponding vector registers. The entry with * indexes 0-31 contain the corresponding vector registers. The entry with
* index 32 contains the vscr as the last word (offset 12) within the * index 32 contains the vscr as the last word (offset 12) within the