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powerpc: Remove f{max,min}{f} assembly implementations
This patch removes the powerpc assembly implementation of fmax/fmin. Based on benchtests, the assembly ones shows: $ ./testrun.sh benchtests/bench-fmax "fmax": { "": { "duration": 5.07586e+09, "iterations": 2.01676e+09, "max": 1350.39, "min": 2.073, "mean": 2.51684 }, "qNaN": { "duration": 5.09315e+09, "iterations": 8.4568e+08, "max": 2788, "min": 5.806, "mean": 6.02255 }, "sNaN": { "duration": 5.09073e+09, "iterations": 8.42316e+08, "max": 4215.84, "min": 5.737, "mean": 6.04373 } And $ ./testrun.sh benchtests/bench-fmin "fmin": { "": { "duration": 5.07711e+09, "iterations": 2.02982e+09, "max": 497.094, "min": 2.073, "mean": 2.50126 }, "qNaN": { "duration": 5.09134e+09, "iterations": 8.46968e+08, "max": 2255.14, "min": 5.807, "mean": 6.01125 }, "sNaN": { "duration": 5.09122e+09, "iterations": 8.4746e+08, "max": 1969.38, "min": 5.729, "mean": 6.00763 } } The default implementation (math/s_f{max.min}_template.c) shows slight better latency for all cases: $ ./testrun.sh benchtests/bench-fmax "fmax": { "": { "duration": 5.07044e+09, "iterations": 2.38695e+09, "max": 2048.58, "min": 2.073, "mean": 2.12423 }, "qNaN": { "duration": 5.09004e+09, "iterations": 9.45428e+08, "max": 3306.93, "min": 5.138, "mean": 5.38385 }, "sNaN": { "duration": 5.08458e+09, "iterations": 1.15959e+09, "max": 972.008, "min": 3.321, "mean": 4.3848 } } And: $ ./testrun.sh benchtests/bench-fmin "fmin": { "": { "duration": 5.06817e+09, "iterations": 2.3913e+09, "max": 1177.9, "min": 2.073, "mean": 2.11942 }, "qNaN": { "duration": 5.08857e+09, "iterations": 9.45656e+08, "max": 2658.83, "min": 5.09, "mean": 5.38099 }, "sNaN": { "duration": 5.08093e+09, "iterations": 1.16725e+09, "max": 1030.74, "min": 3.323, "mean": 4.3529 } } Both were run with GCC 5.4 (ubuntu 16 default installation) using default compiler flags on POWER8E 3.4GHz (powerpc64le-linux-gnu).
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ChangeLog
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ChangeLog
@ -1,3 +1,14 @@
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2016-12-27 Adhemerval Zanella <adhemerval.zanella@linaro.org>
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* sysdeps/powerpc/fpu/s_fmaxf.S: Remove file.
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* sysdeps/powerpc/fpu/s_fminf.S: Likewise.
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* sysdeps/powerpc/fpu/s_fmax.S: Likewise.
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* sysdeps/powerpc/fpu/s_fmin.S: Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_fmax.S: Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_fmin.S: Likewise.
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* sysdeps/powerpc/powerpc64/fpu/s_fmax.S: Likewise.
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* sysdeps/powerpc/powerpc64/fpu/s_fmin.S: Likewise.
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2016-12-27 Gabriel F. T. Gomes <gftg@linux.vnet.ibm.com>
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* manual/arith.texi (FP Comparison Functions): Fix typo in iseqsig.
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@ -1,77 +0,0 @@
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/* Floating-point maximum. PowerPC version.
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Copyright (C) 1997-2016 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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ENTRY(__fmax)
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/* double [f1] fmax (double [f1] x, double [f2] y); */
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fcmpu cr0,fp1,fp2
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blt cr0,0f /* if x < y, neither x nor y can be NaN... */
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bnulr+ cr0
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/* x and y are unordered, so one of x or y must be a NaN... */
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fcmpu cr1,fp2,fp2
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bun cr1,1f
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/* x is a NaN; y is not. Test if x is signaling. */
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#ifdef __powerpc64__
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stfd fp1,-8(r1)
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lwz r3,-8+HIWORD(r1)
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#else
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stwu r1,-16(r1)
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cfi_adjust_cfa_offset (16)
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stfd fp1,8(r1)
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lwz r3,8+HIWORD(r1)
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addi r1,r1,16
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cfi_adjust_cfa_offset (-16)
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#endif
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andis. r3,r3,8
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bne cr0,0f
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b 2f
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1: /* y is a NaN; x may or may not be. */
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fcmpu cr1,fp1,fp1
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bun cr1,2f
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/* y is a NaN; x is not. Test if y is signaling. */
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#ifdef __powerpc64__
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stfd fp2,-8(r1)
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lwz r3,-8+HIWORD(r1)
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#else
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stwu r1,-16(r1)
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cfi_adjust_cfa_offset (16)
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stfd fp2,8(r1)
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lwz r3,8+HIWORD(r1)
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addi r1,r1,16
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cfi_adjust_cfa_offset (-16)
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#endif
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andis. r3,r3,8
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bnelr cr0
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2: /* x and y are NaNs, or one is a signaling NaN. */
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fadd fp1,fp1,fp2
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blr
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0: fmr fp1,fp2
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blr
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END(__fmax)
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weak_alias (__fmax,fmax)
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/* It turns out that it's safe to use this code even for single-precision. */
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strong_alias(__fmax,__fmaxf)
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weak_alias (__fmax,fmaxf)
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#ifdef NO_LONG_DOUBLE
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weak_alias (__fmax,__fmaxl)
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weak_alias (__fmax,fmaxl)
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#endif
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@ -1 +0,0 @@
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/* __fmaxf is in s_fmax.c */
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@ -1,77 +0,0 @@
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/* Floating-point minimum. PowerPC version.
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Copyright (C) 1997-2016 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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ENTRY(__fmin)
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/* double [f1] fmin (double [f1] x, double [f2] y); */
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fcmpu cr0,fp1,fp2
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bgt cr0,0f /* if x > y, neither x nor y can be NaN... */
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bnulr+ cr0
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/* x and y are unordered, so one of x or y must be a NaN... */
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fcmpu cr1,fp2,fp2
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bun cr1,1f
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/* x is a NaN; y is not. Test if x is signaling. */
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#ifdef __powerpc64__
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stfd fp1,-8(r1)
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lwz r3,-8+HIWORD(r1)
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#else
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stwu r1,-16(r1)
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cfi_adjust_cfa_offset (16)
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stfd fp1,8(r1)
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lwz r3,8+HIWORD(r1)
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addi r1,r1,16
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cfi_adjust_cfa_offset (-16)
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#endif
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andis. r3,r3,8
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bne cr0,0f
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b 2f
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1: /* y is a NaN; x may or may not be. */
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fcmpu cr1,fp1,fp1
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bun cr1,2f
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/* y is a NaN; x is not. Test if y is signaling. */
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#ifdef __powerpc64__
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stfd fp2,-8(r1)
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lwz r3,-8+HIWORD(r1)
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#else
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stwu r1,-16(r1)
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cfi_adjust_cfa_offset (16)
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stfd fp2,8(r1)
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lwz r3,8+HIWORD(r1)
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addi r1,r1,16
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cfi_adjust_cfa_offset (-16)
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#endif
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andis. r3,r3,8
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bnelr cr0
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2: /* x and y are NaNs, or one is a signaling NaN. */
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fadd fp1,fp1,fp2
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blr
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0: fmr fp1,fp2
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blr
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END(__fmin)
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weak_alias (__fmin,fmin)
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/* It turns out that it's safe to use this code even for single-precision. */
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strong_alias(__fmin,__fminf)
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weak_alias (__fmin,fminf)
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#ifdef NO_LONG_DOUBLE
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weak_alias (__fmin,__fminl)
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weak_alias (__fmin,fminl)
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#endif
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/* __fminf is in s_fmin.c */
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#include <math_ldbl_opt.h>
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#include <sysdeps/powerpc/fpu/s_fmax.S>
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#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
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compat_symbol (libm, __fmax, fmaxl, GLIBC_2_1)
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#endif
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#include <math_ldbl_opt.h>
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#include <sysdeps/powerpc/fpu/s_fmin.S>
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#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
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compat_symbol (libm, __fmin, fminl, GLIBC_2_1)
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#endif
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#include <math_ldbl_opt.h>
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#include <sysdeps/powerpc/fpu/s_fmax.S>
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#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
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compat_symbol (libm, __fmax, fmaxl, GLIBC_2_1)
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#endif
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#include <math_ldbl_opt.h>
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#include <sysdeps/powerpc/fpu/s_fmin.S>
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#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
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compat_symbol (libm, __fmin, fminl, GLIBC_2_1)
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#endif
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