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sparc: Remove ununsed ifunc assembly macros
Now that all SPARC ifunc converted to C implementation there is no need for both C and assembly macros. This patch removes the assembly ones. Checked on sparcv9-linux-gnu and sparc64-linux-gnu. * sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT, SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC, SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros. Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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@ -1,5 +1,9 @@
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2017-12-01 Adhemerval Zanella <adhemerval.zanella@linaro.org>
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* sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT,
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SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC,
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SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
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* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c: Fix build
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due redirect macro.
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@ -17,137 +17,6 @@
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#include <sysdep.h>
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#ifdef __ASSEMBLER__
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# ifdef SHARED
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# define SPARC_ASM_IFUNC_DFLT(name, dflt) \
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ENTRY (__##name) \
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.type __##name, @gnu_indirect_function; \
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SETUP_PIC_REG_LEAF(o3, o5); \
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sethi %gdop_hix22(dflt), %o1; \
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xor %o1, %gdop_lox10(dflt), %o1; \
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add %o3, %o1, %o1; \
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retl; \
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mov %o1, %o0; \
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END (__##name)
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# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \
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ENTRY (__##name) \
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.type __##name, @gnu_indirect_function; \
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SETUP_PIC_REG_LEAF(o3, o5); \
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set m1, %o1; \
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andcc %o0, %o1, %g0; \
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be 9f; \
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nop; \
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sethi %gdop_hix22(f1), %o1; \
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xor %o1, %gdop_lox10(f1), %o1; \
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ba 10f; \
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nop; \
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9: sethi %gdop_hix22(dflt), %o1; \
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xor %o1, %gdop_lox10(dflt), %o1; \
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10: add %o3, %o1, %o1; \
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retl; \
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mov %o1, %o0; \
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END (__##name)
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# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \
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ENTRY (__##name) \
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.type __##name, @gnu_indirect_function; \
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SETUP_PIC_REG_LEAF(o3, o5); \
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set m1, %o1; \
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andcc %o0, %o1, %g0; \
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be 8f; \
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nop; \
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sethi %gdop_hix22(f1), %o1; \
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xor %o1, %gdop_lox10(f1), %o1; \
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ba 10f; \
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nop; \
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8: set m2, %o1; \
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andcc %o0, %o1, %g0; \
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be 9f; \
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nop; \
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sethi %gdop_hix22(f2), %o1; \
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xor %o1, %gdop_lox10(f2), %o1; \
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ba 10f; \
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nop; \
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9: sethi %gdop_hix22(dflt), %o1; \
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xor %o1, %gdop_lox10(dflt), %o1; \
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10: add %o3, %o1, %o1; \
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retl; \
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mov %o1, %o0; \
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END (__##name)
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# else /* SHARED */
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# ifdef __arch64__
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# define SET(SYM, TMP, REG) setx SYM, TMP, REG
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# else
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# define SET(SYM, TMP, REG) set SYM, REG
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# endif
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# define SPARC_ASM_IFUNC_DFLT(name, dflt) \
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ENTRY (__##name) \
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.type __##name, @gnu_indirect_function; \
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SET(dflt, %g1, %o1); \
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retl; \
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mov %o1, %o0; \
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END (__##name)
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# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \
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ENTRY (__##name) \
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.type __##name, @gnu_indirect_function; \
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set m1, %o1; \
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andcc %o0, %o1, %g0; \
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be 9f; \
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nop; \
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SET(f1, %g1, %o1); \
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ba 10f; \
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nop; \
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9: SET(dflt, %g1, %o1); \
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10: retl; \
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mov %o1, %o0; \
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END (__##name)
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# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \
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ENTRY (__##name) \
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.type __##name, @gnu_indirect_function; \
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set m1, %o1; \
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andcc %o0, %o1, %g0; \
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be 8f; \
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nop; \
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SET(f1, %g1, %o1); \
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ba 10f; \
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nop; \
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8: set m2, %o1; \
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andcc %o0, %o1, %g0; \
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be 9f; \
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nop; \
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SET(f2, %g1, %o1); \
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ba 10f; \
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nop; \
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9: SET(dflt, %g1, %o1); \
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10: retl; \
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mov %o1, %o0; \
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END (__##name)
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# endif /* SHARED */
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#define SPARC_ASM_VIS2_IFUNC(name) \
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SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS2, \
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__##name##_vis2, __##name##_generic)
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#define SPARC_ASM_VIS3_IFUNC(name) \
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SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS3, \
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__##name##_vis3, __##name##_generic)
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#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \
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SPARC_ASM_IFUNC2(name, HWCAP_SPARC_VIS3, \
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__##name##_vis3, \
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HWCAP_SPARC_VIS2, \
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__##name##_vis2, __##name##_generic)
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#else /* __ASSEMBLER__ */
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#define INIT_ARCH()
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#define sparc_libc_ifunc_redirected(redirected_name, name, expr) \
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@ -170,4 +39,3 @@ END (__##name)
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#else
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# define sparc_ifunc_redirected_hidden_def(redirect_name, name)
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#endif
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#endif /* __ASSEMBLER__ */
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